ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 284

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ST92F150-EVAL

Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Datasheets

Specifications of ST92F150-EVAL

Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905

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0
J1850 Byte Level Protocol Decoder (JBLPD)
10.9 J1850 Byte Level Protocol Decoder (JBLPD)
10.9.1 Introduction
The JBLPD is used to exchange data between the
ST9 microcontroller and an external J1850 trans-
ceiver I.C.
The JBLPD transmits a string of variable pulse
width (VPW) symbols to the transceiver. It also re-
ceives VPW encoded symbols from the transceiv-
er, decodes them and places the data in a register.
In-frame responses of type 0, 1, 2 and 3 are sup-
ported and the appropriate normalization bit is
generated automatically. The JBLPD filters out
any incoming messages which it does not care to
receive. It also includes a programmable external
loop delay.
The JBLPD uses two signals to communicate with
the transceiver:
– VPWI (input)
– VPWO (output)
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10.9.2 Main Features
SAE J1850 compatible
Digital filter
In-Frame Responses of type 0, 1, 2, 3 supported
with automatic normalization bit
Programmable External Loop Delay
Diagnostic 4x time mode
Diagnostic Local Loopback mode
Wide range of MCU internal frequencies
allowed
Low
suspended)
Very low power consumption mode (JBLPD
disabled)
Don’t care message filter
Selectable VPWI input polarity
Selectable Normalization Bit symbol form
6 maskable interrupts
DMA transmission and reception with End Of
Block interrupts
power
consumption
mode
(JBLPD

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