C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 275

DEV KIT FOR F040/F041/F042/F043

C8051F040DK

Manufacturer Part Number
C8051F040DK
Description
DEV KIT FOR F040/F041/F042/F043
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F040DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F040
Silicon Family Name
C8051F04x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1205

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F040DK
Manufacturer:
SiliconL
Quantity:
9
Bit7:
Bit6:
Bit5:
Bit4:
Bits3-2:
Bits1-0:
FE0
R/W
Bit7
FE0: Frame Error Flag.
This flag indicates if an invalid (low) STOP bit is detected.
0: Frame Error has not been detected
1: Frame Error has been detected.
RXOV0: Receive Overrun Flag.
This flag indicates new data has been latched into the receive buffer before software has
read the previous byte.
0: Receive overrun has not been detected.
1: Receive Overrun has been detected.
TXCOL0: Transmit Collision Flag.
This flag indicates user software has written to the SBUF0 register while a transmission is in
progress.
0: Transmission Collision has not been detected.
1: Transmission Collision has been detected.
SMOD0: UART0 Baud Rate Doubler Enable.
This bit enables/disables the divide-by-two function of the UART0 baud rate logic for config-
urations described in the UART0 section.
0: UART0 baud rate divide-by-two enabled.
1: UART0 baud rate divide-by-two disabled.
UART0 Transmit Baud Rate Clock Selection Bits.
UART0 Receive Baud Rate Clock Selection Bits
SFR Definition 21.2. SSTA0: UART0 Status and Clock Selection
S0RCLK1 S0RCLK0
S0TCLK1
RXOV0
0
0
1
1
0
0
1
1
R/W
Bit6
S0TCLK0
TXCOL0 SMOD0 S0TCLK1 S0TCLK0 S0RCLK1 S0RCLK0 00000000
R/W
Bit5
0
1
0
1
0
1
0
1
Timer 2 Overflow generates UART0 RX baud rate
Timer 3 Overflow generates UART0 RX baud rate
Timer 4 Overflow generates UART0 RX baud rate
Timer 2 Overflow generates UART0 TX baud rate
Timer 3 Overflow generates UART0 TX baud rate
Timer 4 Overflow generates UART0 TX baud rate
R/W
Bit4
Serial Transmit Baud Rate Clock Source
Serial Receive Baud Rate Clock Source
Timer 1 generates UART0 RX Baud Rate
Timer 1 generates UART0 TX Baud Rate
Rev. 1.5
R/W
Bit3
C8051F040/1/2/3/4/5/6/7
R/W
Bit2
R/W
Bit1
SFR Address:
SFR Page:
R/W
Bit0
0x91
0
Reset Value
275

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