C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 121

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

11. Comparators
C8051F04x family of devices include three on-chip programmable voltage comparators, shown in
Figure 11.1. Each comparator offers programmable response time and hysteresis. When assigned to a
Port pin, the Comparator output may be configured as open drain or push-pull, and Comparator inputs
should be configured as analog inputs (see
log Inputs” on page
“13.5. Comparator0 Reset” on page
The output of a Comparator can be polled by software, used as an interrupt source, used as a reset
source, and/or routed to a Port pin. Each comparator can be individually enabled and disabled (shutdown).
When disabled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic
low state, and its supply current falls to less than 1 µA. See
and Allocation” on page 205
The Comparator inputs can be externally driven from -0.25 V to (V
The complete electrical specifications for the Comparator are given in Table 11.1.
The Comparator response time may be configured in software using the CPnMD1-0 bits in register CPT-
nMD (see SFR Definition 11.2). Selecting a longer response time reduces the amount of power consumed
by the comparator. See Table 11.1 for complete timing and current consumption specifications.
Comparator Pin Assignments
CP0 +
CP1 +
CP2 +
CP0 -
CP1 -
CP2 -
Figure 11.1. Comparator Functional Block Diagram
P2.6
P2.7
P2.2
P2.3
P2.4
P2.5
207). The Comparator may also be used as a reset source (see
CPnHYP1
CPnHYP0
CPnHYN1
CPnHYN0
CPnOUT
CPnRIF
CPnFIF
CPnEN
for details on configuring the Comparator output via the digital Crossbar.
CPn +
CPn -
CPnRIEN
CPnFIEN
CPnMD1
CPnMD0
167).
Section “17.1.5. Configuring Port 1, 2, and 3 Pins as Ana-
+
-
Rev. 1.5
GND
VDD
C8051F040/1/2/3/4/5/6/7
Decision
Reset
Tree
Section “17.1.1. Crossbar Pin Assignment
(SYNCHRONIZER)
D
SET
CLR
Q
Q
DD
D
SET
CLR
) + 0.25 V without damage or upset.
Q
Q
Interrupt Flag
Rising-edge
CPn
Crossbar
Interrupt
Logic
Interrupt Flag
Falling-edge
Interrupt
CPn
CPn
CPn
Section
121