C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 19

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

1.
The C8051F04x family of devices are fully integrated mixed-signal System-on-a-Chip MCUs with 64 digital
I/O pins (C8051F040/2/4/6) or 32 digital I/O pins (C8051F041/3/5/7), and an integrated CAN 2.0B control-
ler. Highlighted features are listed below; refer to Table 1.1 for specific product feature selection.
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With on-chip V
stand-alone System-on-a-Chip solutions. All analog and digital peripherals are enabled/disabled and con-
figured by user firmware. The Flash memory can be reprogrammed even in-circuit, providing non-volatile
data storage, and also allowing field upgrades of the 8051 firmware.
On-board JTAG debug circuitry allows non-intrusive (uses no on-chip resources), full speed, in-circuit pro-
gramming and debugging using the production MCU installed in the final application. This debug system
supports inspection and modification of memory and registers, setting breakpoints, watchpoints, single
stepping, Run, and Halt commands. All analog and digital peripherals are fully functional while debugging
using JTAG.
Each MCU is specified for 2.7 V to 3.6 V operation over the industrial temperature range (–45 to +85 °C).
The Port I/Os, /RST, and JTAG pins are tolerant for input signals up to 5 V. The C8051F040/2/4/6 are avail-
able in a 100-pin TQFP and the C8051F041/3/5/7 are available in a 64-pin TQFP.
High-Speed pipelined 8051-compatible CIP-51 microcontroller core (up to 25 MIPS)
Controller Area Network (CAN 2.0B) Controller with 32 message objects, each with its own indentifier
mask.
In-system, full-speed, non-intrusive debug interface (on-chip)
True 12-bit (C8051F040/1) or 10-bit (C8051F042/3/4/5/6/7) 100 ksps 8-channel ADC with PGA and
analog multiplexer
High Voltage Difference Amplifier input to the 12/10-bit ADC (60 V Peak-to-Peak) with programmable
gain.
True 8-bit 500 ksps 8-channel ADC with PGA and analog multiplexer (C8051F040/1/2/3)
Two 12-bit DACs with programmable update scheduling (C8051F040/1/2/3)
64 kB (C8051F040/1/2/3/4/5) or 32 kB (C8051F046/7) of in-system programmable Flash memory
4352 (4096 + 256) bytes of on-chip RAM
External Data Memory Interface with 64 kB address space
SPI, SMBus/I
Five general purpose 16-bit Timers
Programmable Counter/Timer Array with six capture/compare modules
On-chip Watchdog Timer, V
System Overview
DD
2
monitor, Watchdog Timer, and clock oscillator, the C8051F04x family of devices are truly
C, and (2) UART serial interfaces implemented in hardware
DD
Monitor, and Temperature Sensor
Rev. 1.5
C8051F040/1/2/3/4/5/6/7
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