C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 224

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

C8051F040/1/2/3/4/5/6/7
224
Bits7-0:
Note:
Bits7-0:
P6.7
R/W
R/W
Bit7
Bit7
P6.[7:0]: Port6 Output Latch Bits.
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (Open-Drain if corresponding P6MDOUT bit = 0). See SFR Definition
17.21.
Read - Returns states of I/O pins.
0: P6.n pin is logic low.
1: P6.n pin is logic high.
P6.[7:0] can be driven by the External Data Memory Interface (as Address[15:8] in Multi-
plexed mode, or as Address[7:0] in Non-multiplexed mode). See
Data Memory Interface and On-Chip XRAM” on page 187
External Memory Interface.
P6MDOUT.[7:0]: Port6 Output Mode Bits.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P6.6
R/W
R/W
Bit6
Bit6
SFR Definition 17.21. P6MDOUT: Port6 Output Mode
P6.5
R/W
R/W
Bit5
Bit5
SFR Definition 17.20. P6: Port6 Data
P6.4
R/W
R/W
Bit4
Bit4
Rev. 1.5
P6.3
R/W
R/W
Bit3
Bit3
P6.2
R/W
R/W
Bit2
Bit2
P6.1
for more information about the
R/W
R/W
Bit1
Bit1
Section “16. External
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P6.0
R/W
R/W
Bit0
Bit0
0x9E
F
0xE8
F
00000000
Addressable
Reset Value
Reset Value
11111111
Bit