C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 162

• Manufacturer Part Number: C8051F040DK
• Description: DEV KIT FOR F040/F041/F042/F043
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F040
• Silicon Family Name: C8051F04x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1205

C8051F040/1/2/3/4/5/6/7
162
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
R/W
Bit7
-
Reserved.
EP1: UART1 Interrupt Priority Control.
This bit sets the priority of the UART1 interrupt.
0: UART1 interrupt set to low level.
1: UART1 interrupt set to high level.
PCAN0: CAN Interrupt Priority Control.
This bit sets the priority of the CAN Interrupt.
0: CAN Interrupt set to low priority level.
1: CAN Interrupt set to high priority level.
PADC2: ADC2 End Of Conversion Interrupt Priority Control (C8051F040/1/2/3 only).
This bit sets the priority of the ADC2 End of Conversion interrupt.
0: ADC2 End of Conversion interrupt set to low level.
1: ADC2 End of Conversion interrupt set to low level.
PWADC2: ADC2 Window Comparator Interrupt Priority Control (C8051F040/1/2/3 only).
0: ADC2 Window interrupt set to low level.
1: ADC2 Window interrupt set to high level.
PT4: Timer 4 Interrupt Priority Control.
This bit sets the priority of the Timer 4 interrupt.
0: Timer 4 interrupt set to low level.
1: Timer 4 interrupt set to low level.
PADC0: ADC End of Conversion Interrupt Priority Control.
This bit sets the priority of the ADC0 End of Conversion Interrupt.
0: ADC0 End of Conversion interrupt set to low priority level.
1: ADC0 End of Conversion interrupt set to high priority level.
PT3: Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupts.
0: Timer 3 interrupt set to low priority level.
1: Timer 3 interrupt set to high priority level.
EP1
SFR Definition 12.16. EIP2: Extended Interrupt Priority 2
R/W
Bit6
PX7
R/W
Bit5
PADC2
R/W
Bit4
PWADC2
Rev. 1.5
R/W
Bit3
PT4
R/W
Bit2
PADC0
R/W
Bit1
SFR Address:
SFR Page:
PT3
R/W
Bit0
0xF7
All Pages
00000000
Reset Value