MAX3420EEVKIT-2+ Maxim Integrated Products, MAX3420EEVKIT-2+ Datasheet - Page 11
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MAX3420EEVKIT-2+
Manufacturer Part Number
MAX3420EEVKIT-2+
Description
EVAL KIT FOR MAX3420E
Manufacturer
Maxim Integrated Products
Specifications of MAX3420EEVKIT-2+
Main Purpose
Interface, USB 2.0 Slave
Embedded
No
Utilized Ic / Part
MAX3420E
Primary Attributes
Full Speed (12Mbps), SPI Interface, No Custom USB Drivers
Secondary Attributes
4 GPI Pushbuttons, 4 GPO LEDs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 6. Rise and Fall Times
Figure 8. SPI Bus Timing Diagram (Full-Duplex Mode, SPI Mode (0,0))
Figure 9. SPI Bus Timing Diagram (Half-Duplex Mode, SPI Mode (0,0))
V
V
OH
OL
SCLK
MOSI
NOTES:
1) DURING THE FIRST 8 CLOCKS CYCLES, THE MOSI PIN IS HIGH IMPEDANCE AND THE SPI MASTER DRIVES DATA ONTO THE MOSI PIN. SETUP AND HOLD TIMES ARE THE SAME AS
2) FOR SPI WRITE CYCLES, THE MOSI PIN CONTINUES TO BE HIGH IMPEDANCE AND THE EXTERNAL MASTER CONTINUES TO DRIVE MOSI.
3) FOR SPI READ CYCLES, AFTER THE 8TH CLOCK-RISING EDGE, THE MAX3420E STARTS DRIVING THE MOSI PIN AFTER TIME t
MISO
SCLK
MOSI
MISO
FOR FULL-DUPLEX MODE.
OFF ITS DRIVER TO THE MOSI PIN BEFORE t
SS
SS
HIGH IMPEDANCE
HIGH
IMPEDANCE
t
RISE
______________________________________________________________________________________
t
CSS
t
L
t
L
1
1
ON
TO AVOID CONTENTION. PROPAGATION DELAYS ARE THE SAME AS FOR THE MOSI PIN IN FULL-DUPLEX MODE.
t
DS
t
DS
t
FALL
t
DH
t
DH
2
2
10%
90%
USB Peripheral Controller
8
8
t
ON
Figure 7. Load for D+/D- AC Measurements
Test Circuits and Timing Diagrams
9
9
t
DI
t
DO
t
MAX3420E
CL
t
CL
with SPI Interface
t
CP
t
CP
t
10
CH
ON
t
D+ OR D-
10
CH
. THE EXTERNAL MASTER MUST TURN
33Ω
16
16
t
T
t
T
HIGH IMPEDANCE
t
OFF
HIGH
IMPEDANCE
t
CSW
C
t
POINT
L
CSW
TEST
HI-Z
15kΩ
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