MCP1631RD-MCC2 Microchip Technology, MCP1631RD-MCC2 Datasheet - Page 226
![REFERENCE DESIGN MCP1631HV](/photos/9/4/90424/mcp1631rd-mcc2_sml.jpg)
MCP1631RD-MCC2
Manufacturer Part Number
MCP1631RD-MCC2
Description
REFERENCE DESIGN MCP1631HV
Manufacturer
Microchip Technology
Datasheets
1.MCP1631VHVT-330EST.pdf
(34 pages)
2.MCP1631HV-330EST.pdf
(54 pages)
3.MCP1631RD-MCC2.pdf
(20 pages)
4.MCP1631RD-MCC2.pdf
(328 pages)
Specifications of MCP1631RD-MCC2
Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 5 Cell- NiCd/NiMH, 1 ~ 2 1W LEDs
Secondary Attributes
Status LEDs
Silicon Manufacturer
Microchip
Application Sub Type
Battery Charger
Kit Application Type
Power Management - Battery
Silicon Core Number
MCP1631HV, PIC16F883
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCP1631VHVT-330EST PDF datasheet
- MCP1631HV-330EST PDF datasheet #2
- MCP1631RD-MCC2 PDF datasheet #3
- MCP1631RD-MCC2 PDF datasheet #4
- Current page: 226 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
14.5
The WDT has the following features:
• Operates from the LFINTOSC (31 kHz)
• Contains a 16-bit prescaler
• Shares an 8-bit prescaler with Timer0
• Time-out period is from 1 ms to 268 seconds
• Configuration bit and software controlled
WDT is cleared under certain conditions described in
Table 14-7.
14.5.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit of the OSCCON register does
not reflect that the LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 17 ms.
FIGURE 14-9:
TABLE 14-7:
DS41291F-page 224
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
Note 1:
31 kHz
Watchdog Timer (WDT)
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
This is the shared Timer0/WDT prescaler. See Section 5.1.3 “Software Programmable Prescaler” for more information.
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from the Configuration Word Register 1
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
14.5.2
The WDTE bit is located in the Configuration Word
Register 1. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word
Register 1 is set, the SWDTEN bit of the WDTCON
register has no effect. If WDTE is clear, then the
SWDTEN bit can be used to enable and disable the
WDT. Setting the bit will enable it and clearing the bit
will disable it.
The PSA and PS<2:0> bits of the OPTION register
have the same function as in previous versions of the
PIC16F882/883/884/886/887 Family of microcon-
trollers. See Section 5.0 “Timer0 Module” for more
information.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
© 2009 Microchip Technology Inc.
0
Prescaler
Cleared
1
8
WDT
(1)
PSA
PS<2:0>
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