MCP1631RD-MCC2 Microchip Technology, MCP1631RD-MCC2 Datasheet - Page 148
![REFERENCE DESIGN MCP1631HV](/photos/9/4/90424/mcp1631rd-mcc2_sml.jpg)
MCP1631RD-MCC2
Manufacturer Part Number
MCP1631RD-MCC2
Description
REFERENCE DESIGN MCP1631HV
Manufacturer
Microchip Technology
Datasheets
1.MCP1631VHVT-330EST.pdf
(34 pages)
2.MCP1631HV-330EST.pdf
(54 pages)
3.MCP1631RD-MCC2.pdf
(20 pages)
4.MCP1631RD-MCC2.pdf
(328 pages)
Specifications of MCP1631RD-MCC2
Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 5 Cell- NiCd/NiMH, 1 ~ 2 1W LEDs
Secondary Attributes
Status LEDs
Silicon Manufacturer
Microchip
Application Sub Type
Battery Charger
Kit Application Type
Power Management - Battery
Silicon Core Number
MCP1631HV, PIC16F883
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCP1631VHVT-330EST PDF datasheet
- MCP1631HV-330EST PDF datasheet #2
- MCP1631RD-MCC2 PDF datasheet #3
- MCP1631RD-MCC2 PDF datasheet #4
- Current page: 148 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
11.6.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can be simultaneously available on
multiple pins.
Once
(CCP1M<3:2> = 11
CCP1CON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits of the
PSTRCON register, as shown in Table 11-5.
REGISTER 11-5:
DS41291F-page 146
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
the
The PWM Steering mode is available only when the CCP1CON register bits CCP1M<3:2> = 11 and
P1M<1:0> = 00.
PULSE STEERING MODE
Single
Unimplemented: Read as ‘0’
STRSYNC: Steering Sync bit
1 = Output steering update occurs on next PWM period
0 = Output steering update occurs at the beginning of the instruction cycle boundary
STRD: Steering Enable bit D
1 = P1D pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1D pin is assigned to port pin
STRC: Steering Enable bit C
1 = P1C pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1C pin is assigned to port pin
STRB: Steering Enable bit B
1 = P1B pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1B pin is assigned to port pin
STRA: Steering Enable bit A
1 = P1A pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1A pin is assigned to port pin
U-0
—
and
PSTRCON: PULSE STEERING CONTROL REGISTER
Output
P1M<1:0> = 00
W = Writable bit
‘1’ = Bit is set
mode
U-0
—
is
selected
STRSYNC
of
R/W-0
the
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
STRD
While the PWM Steering mode is active, CCP1M<1:0>
bits of the CCP1CON register select the PWM output
polarity for the P1<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode as described in Section 11.6.4
“Enhanced PWM Auto-shutdown mode”. An auto-
shutdown event will only affect pins that have PWM
outputs enabled.
Note:
The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.
R/W-0
STRC
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
STRB
R/W-1
STRA
bit 0
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