LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 82

• Manufacturer Part Number: LM96194CISQ/NOPB
• Description: IC TRUTHERM HDWR MONITOR 48-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®, TruTherm®r

Specifications of LM96194CISQ/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96194CISQTR

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16.13.14 Register C9h PWM1 Control 2
Register
Address
C9h
Read/
Write
R/W
7:4
Bit
0
1
2
3
Register
Control 2
PWM1
Name
OVR_DC
Name
EPPL
OVR
PPL
INV
Bit 7
R/W
R/W
R/W
R/W
R/W
R/W
Bit 6
OVR_DC
When set, enables manual duty cycle override for
PWM1.
Invert PWM1 output. When 0, 100% duty cycle
corresponds to the PWM output continuously HIGH.
When 1, 100% duty cycle corresponds to the PWM
output continuously LOW.
Enable PROCHOT PWM1 lock. When set, this bit
causes bound PROCHOT events on PWM1 to trigger
PPL (bit [3]). When cleared, PPL never gets set.
PROCHOT PWM1 lock. When set, this bit indicates that
PWM1 is currently being held at 100% because a bound
PROCHOT event occurred while EPPL (bit [2]) was set.
This bit is cleared by writing a zero. Clearing this bit
allows the fans to return to normal operation. This bit is
not locked by the LOCK bit in the LM96194 Configuration
register.
This field sets the duty cycle that will be used by PWM1
whenever manual low resolution override mode is active.
This field accepts 16 possible values that are mapped to
duty cycles according the table in the Fan Control
section. Whenever this register is read, it returns the duty
cycle that is currently being used by PWM1 regardless
of whether override mode is active or not. The value read
may not match the last value written if another control
source is requesting a greater duty cycle. This field
always returns 0h when the PWM1 spin up cycle is
active.
Bit 5
82
Bit 4
Description
Bit 3
PPL
EPPL
Bit 2
Bit 1
INV
Bit 0
OVR
Default
Value
00h