LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 17

• Manufacturer Part Number: LM96194CISQ/NOPB
• Description: IC TRUTHERM HDWR MONITOR 48-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®, TruTherm®r

Specifications of LM96194CISQ/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96194CISQTR

12.14 FAN SPEED MEASUREMENT
The fan tach circuitry measures the period of the fan pulses
by enabling a counter for two periods of the fan tach signal.
The accumulated count is proportional to the fan tach period
and inversely proportional to the fan speed. All four fan tach
signals are measured within 1 second.
Fans in general do not over-speed if run from the correct volt-
age, so the failure condition of interest is under speed due to
electrical or mechanical failure. For this reason only low-
speed limits are programmed into the limit registers for the
fans. It should be noted that, since fan period rather than
speed is being measured, a fan tach error event occurs when
the measurement exceeds the limit value.
12.15 SMART FAN SPEED MEASUREMENT
If a fan's speed is varied using PWM drive of either of the fans
power pins, the tachometer output of the fan is corrupted. The
LM96194 includes smart tachometer circuitry that allows an
accurate tachometer reading to be achieved despite the sig-
nal corruption. In smart tach mode all four signals are mea-
sured within 4 seconds.
A smart tach capture cycle works according to the following
steps:
1.
2.
3.
The lowest two bits in each of the Fan Tach value registers
are reserved. The smart tach feature takes advantage of
these bits. In normal tach mode, these bits return 00. In smart
tach mode the two bits determine the accuracy level of the
reading. 11 is most accurate (2 periods used) and 10 is the
least accurate (1 period used). If less than 1 period occurred
during the measurement cycle, the lower two bits are set to
10.
In smart fan tach mode, the TACH_EDGE field is honored in
the LM96194 Status/Control register. If only one edge type is
active, the measurement always uses that edge type (rising
or falling). If both are active, the measurement uses whichev-
er edge type occurs first.
Typically the minimum RPM captured by smart fan tach mode
is 900 RPM for a fan that produces two pulses per revolution
at about 50% duty cycle.
13.0 Inputs/Outputs
Besides all the pins associated with sensor inputs the
LM96194 has several pins that are assigned for other specific
functions.
13.1 ALERT OUTPUT
The ALERT output is an active-low open drain output signal.
The ALERT output is used to signal a micro-controller that
a) If less than 1 period is sensed during the 50 ms exten-
b) After one period occurs the count for that period is
c) If during the 50 ms interval 2 periods do not occur, the
d) If 2 periods do occur, the 2 period count is loaded into
Both PWM outputs are synchronized such that they
activate simultaneously.
Both PWM output active times are extended for up to 50
ms.
The number of tach signal periods during the 50 ms
interval are tracked:
sion the result returned is 3FFh.
memorized.
tach value reported is the 1 period count multiplied by
2.
the value register and the 50 ms PWM extension is ter-
minated.
17
one or more sensors have crossed their corresponding limit
thresholds. This is generally not a fatal event unless the mi-
cro-controller decides it to be.
If enabled, the ALERT output is asserted whenever any bit in
any BMC Error Status register is set (with the exception of the
fixed PROCHOT threshold bits). By definition, when ALERT
is enabled, it always matches the inverse of the BMC_ERR
bit in the LM96194 Status/Control register. When the
ALERT output is disabled, an alert event can still be deter-
mined by reading the state of the BMC_ERR bit.
The ALERT functions like an interrupt. The LM96194 does not
support the SMBus ARA (Alert Response Address) protocol.
ALERT is only de-asserted when there are no error status bits
set in any BMC Error Status registers. Alternatively, software
can disable the ALERT output to cause it to de-assert. The
ALERT output re-asserts once enabled if any BMC Error Sta-
tus register bits are still set.
The ALERT output also functions in comparator mode for
thermal events, that is the ALERT output will be asserted for
unmasked thermal error events and will de-assert immedi-
ately when the error event ceases. The operation of the
ALERT output is controlled by the LM96194 Configuration
register.
Further information on how the ALERT output behaves can
be found in
ALERT.
13.2 RESET INPUT/OUTPUT
This pin acts as an active low reset output when power is ap-
plied to the LM96194. It is asserted when the LM96194 first
sees a voltage that exceeds the internal POR level on its
+3.3V S/B V
are reset to their defaults when power is applied.
After this reset has completed, the RESET pin becomes an
input. When an external device asserts RESET, the LM96194
clears the LOCK bit in the LM96194 Configuration register.
This feature allows critical registers to be locked and provides
a controlled mechanism to unlock them.
If the LM96194 RESET is not used it must be tied high through
an external resistive pull-up to prevent LM96194 malfunction.
Within 10 µsec of asserting RESET externally, the Sleep
State Control register shall be automatically set to S4/5. This
causes several error events to be masked according to the
S4/5 masking definitions. Refer to the register descriptions for
more information. RESET may not be detected if it is asserted
for less than 4 µsec.
13.3 PWM1 AND PWM2 OUTPUTS
The PWM outputs are used to control the speed of fans. The
duty cycle of each output is automatically controlled by the
temperature of one or more temperature zones. They are also
influenced by various other inputs and registers. See
tion 15.10 FAN CONTROL
behavior of the PWM outputs.
13.4 VRD_HOT INPUT
These inputs monitor the thermal sensor associated with
each processor VRD on a baseboard. When one of the inputs
is activated, it indicates that the VRD has exceeded a prede-
termined temperature threshold. The LM96194 responds by
gradually increasing the duty cycle of any PWM outputs that
are bound to the corresponding processor and setting the ap-
propriate error status bits. The PROCHOT signal is also
asserted. See the
Section 12.13 PROCHOT OUTPUT CONTROL
formation.
Section 15.7 MASKING, ERROR STATUS AND
DD
input. The internal registers of the LM96194
Section 15.10 FAN CONTROL
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