LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 20

• Manufacturer Part Number: LM96194CISQ/NOPB
• Description: IC TRUTHERM HDWR MONITOR 48-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®, TruTherm®r

Specifications of LM96194CISQ/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96194CISQTR

www.national.com
14.5.3 Write Operations
The LM96194 supports the following SMBus write protocols.
14.5.3.1 Write Byte
In this operation the master device sends an address byte and one data byte to the slave device, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
14.5.3.2 Write Word
In this operation the master device sends an address byte and two data bytes to the slave device, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master asserts a STOP condition to end the transaction.
14.5.3.3 SMBus Write Block to Any Address
The start address for a block write is embedded in this transaction. In this operation the master sends a block of data to the slave
as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master sends data byte 2.
11. The slave asserts ACK.
12. The master continues to send data bytes and the slave asserts ACK for each byte.
13. The master asserts a STOP condition to end the transaction.
The master device asserts a START condition.
The master sends the 7-bit slave address followed by the write bit (low).
The addressed slave device asserts ACK.
The master sends a command code (register address).
The slave asserts ACK.
The master sends the data byte.
The slave asserts ACK.
The master asserts a STOP condition to end the transaction.
The master device asserts a START condition.
The master sends the 7-bit slave address followed by the write bit (low).
The addressed slave device asserts ACK.
The master sends a command code (register address).
The slave asserts ACK.
The master sends the low data byte.
The slave asserts ACK.
The master sends the high data byte.
The slave asserts ACK.
The master device asserts a START condition.
The master sends the 7-bit slave address followed by the write bit (low).
The addressed slave device asserts ACK.
The master sends a command code that tells the slave device to expect a block write. The LM96194 command code for a
block write is F0h.
The slave asserts ACK.
The master sends a byte that tells the slave device how many data bytes it will send (N). The SMBus specification allows a
maximum of 32 data bytes to be sent in a block write.
The slave asserts ACK.
The master sends data byte 1, the starting address of the block write.
The slave asserts ACK after each data byte.
1
S
2
Slave
Address
1
S
2
Slave
Address
W
3
A
W
4
Register
Address
3
A
4
Register
Address
5
A
20
6
Data Byte
Low
5
A
6
Data
Byte
7
A
7
A
8
Data Byte
High
8
P
9
A
10
P