LH28F800BJE-PTTL90 Sharp Microelectronics, LH28F800BJE-PTTL90 Datasheet - Page 14

• Manufacturer Part Number: LH28F800BJE-PTTL90
• Description: IC FLASH 8MBIT 90NS 48TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F800BJE-PTTL90

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8 or 512K x 16)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 425-1821; LHF80J01

4.1 Read Array Command
Upon initial device power-up and after exit from reset
mode, the device defaults to read array mode. This
operation is also initiated by writing the Read Array
command. The device remains enabled for reads until
another command is written. Once the internal WSM has
started a block erase, full chip erase, word/byte write or
lock-bit configuration the device will not recognize the
Read Array command until the WSM completes its
operation unless the WSM is suspended via an Erase
Suspend or Word/Byte Write Suspend command. The
Read Array command functions independently of the
V
4.2 Read Identifier Codes Command
The identifier code operation is initiated by writing the
Read Identifier Codes command. Following the command
write, read cycles from addresses shown in Figure 4
retrieve the manufacturer, device, block lock configuration
and permanent lock configuration codes (see Table 4 for
identifier code values). To terminate the operation, write
another valid command. Like the Read Array command,
the
independently of the V
Following the Read Identifier Codes command, the
following information can be read:
NOTE:
1. BA selects the specific block lock configuration code
2. A
3. DQ
Manufacture Code
Device Code
Block Lock Configuration
•Block is Unlocked
•Block is Locked
•Reserved for Future Use
Permanent Lock Configuration
•Device is Unlocked
•Device is Locked
•Reserved for Future Use
CCW
to be read. See Figure 4 for the device identifier code
memory map.
-1
Read
voltage and RP# can be V
15
don’t care in byte mode.
-DQ
8
Code
Identifier
outputs 00H in word mode.
Table 4. Identifier Codes
CCW
Codes
voltage and RP# can be V
IH
Address
.
[A
BA
00000H
00001H
00003H
command
18
(1)
-A
+2
0
(2)
]
[DQ
DQ
DQ
DQ
DQ
Data
DQ
DQ
functions
ECH
B0H
7
-DQ
0
0
0
0
1-7
1-7
=0
=1
=0
=1
(3)
IH
0
]
.
4.3 Read Status Register Command
The status register may be read to determine when a block
erase, full chip erase, word/byte write or lock-bit
configuration is complete and whether the operation
completed successfully. It may be read at any time by
writing the Read Status Register command. After writing
this command, all subsequent read operations output data
from the status register until another valid command is
written. The status register contents are latched on the
falling edge of OE# or CE#, whichever occurs. OE# or
CE# must toggle to V
status register latch. The Read Status Register command
functions independently of the V
V
4.4 Clear Status Register Command
Status register bits SR.5, SR.4, SR.3 or SR.1 are set to
"1"s by the WSM and can only be reset by the Clear Status
Register command. These bits indicate various failure
conditions (see Table 6). By allowing system software to
reset these bits, several operations (such as cumulatively
erasing multiple blocks or writing several words/bytes in
sequence) may be performed. The status register may be
polled to determine if an error occurred during the
sequence.
To clear the status register, the Clear Status Register
command (50H) is written. It functions independently of
the applied V
command is not functional during block erase or
word/byte write suspend modes.
IH
.
CCW
IH
Voltage. RP# can be V
before further reads to update the
CCW
voltage. RP# can be
Rev. 1.27
IH
. This