LH5164A-10L Sharp Microelectronics, LH5164A-10L Datasheet
LH5164A-10L
Specifications of LH5164A-10L
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LH5164A-10L Summary of contents
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... SK-DIP 28-pin, 450-mil SOP 2 28-pin TSOP (Type I) DESCRIPTION The LH5164A/AH are static RAMs organized as 8,192 8 bits fabricated using silicon-gate CMOS proc- ess technology. The LH5164AH is designed for wide temperature range from -40 to +85 C. CMOS 64K (8K PIN CONNECTIONS 28-PIN DIP ...
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... NOTE MEMORY ARRAY (256 x 256) I/O CIRCUITS COLUMN DECODERS COLUMN ADDRESS BUFFER Figure 3. LH5164A/AH Block Diagram SIGNAL I GND NC MODE I/O - I/O SUPPLY CURRENT 1 8 Deselect High-Z Deselect High-Z Write D IN Read D OUT Output disable High-Z CMOS 64K (8K 8) Static RAM ...
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... DC CHARACTERISTICS (V PARAMETER SYMBOL Input leakage current I LI Output leakage I LO current Operating current I CC Standby current I SB1 V OL Output voltage V OH NOTES - (LH5164A/AD/AN/AT LH5164A/AD/AN/AT 3. LH5164AH/AHD/AHN/AHT 4. CE should be V – 0 0.2 V when 100 ns RATING RATING -0.3 to +7.0 -0.3 to +7.0 -0 0 -10 to +70 ...
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... Data hold time Output active from end of write WE to output in High output in High-Z NOTES -10 to +70 C (LH5164A/AD/AN/AT Active output to high-impedance and high-impedance to output active tests specified for a 200 mV transition from steady state levels into the test load. AC TEST CONDITIONS PARAMETER Input voltage amplitude ...
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... I/O NOTE: 1. This parameter is sampled and not production tested. DATA RETENTION CHARACTERISTICS PARAMETER SYMBOL Data retention voltage V Data retention current I Chip disable to data retention Recovery time NOTES -10 to +70 C (LH5164A/AD/AN/AT should 0 0.2 V when CE 2 CCDR 3. LH5164A/AD/AN/AT 4. LH5164AH/AHD/AHN/AHT Read cycle time RC CONDITIONS MIN ...
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... LH5164A/AH CE CONTROL (NOTE 4 CCDR CONTROL 4 CCDR 0 NOTE: To control data hold fix the input level during the data retention mode I NOTE 'HIGH.' 6 DATA RETENTION MODE CDR 0 CCDR DATA RETENTION MODE t CDR CE 0 between CCDR CCDR Figure 4. Low Voltage Data Retention ...
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... While I/O pins are in the output state, input signals with the opposite logic level must not be applied (NOTE (NOTE (NOTE 1) (NOTE 3) t OHZ HIGH DATA VALID = 'LOW 'HIGH,' and WE = 'LOW LOW transition Figure 6. Write Cycle 1 LH5164A/ HIGH transition, 2 5164A-4 7 ...
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... LH5164A/ (NOTE 5) D OUT (NOTE 'LOW' NOTES: 1. The writing occurs during an overlapping period defined as the time from the last occuring transition, either the time when the writing is finished defined as the time from address change to writing start defined as the time from writing finish to address change. ...
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... MIN. 28-pin, 600-mil DIP 15 7.05 [0.278] 6.65 [0.262] 14 0.35 [0.014] 0.15 [0.006] 3.65 [0.144] 3.25 [0.128] 4.40 [0.173] 4.00 [0.157] 3.40 [0.134] 3.00 [0.118] 0.51 [0.02] MIN. 28-pin, 300-mil SK-DIP LH5164A/AH DETAIL 15.24 [0.600] TYP. 28DIP-2 DETAIL 7.62 [0.300] TYP. 28DIP-6 9 ...
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... LH5164A/AH 28SOP (SOP028-P-0450) 1.27 [0.050] TYP. 0.50 [0.020] 0.30 [0.012 18.20 [0.717] 17.80 [0.701] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 10 1.70 [0.067] 15 8.80 [0.346] 12.40 [0.488] 8.40 [0.331] 11.60 [0.457] 14 1.70 [0.067] 0.15 [0.006] 1.025 [0.040] 2.40 [0.094] 2.00 [0.079] ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5164A X X Device Type Operating Package Temperature Example: LH5164AD-10L (CMOS 64K ( Static RAM, 100 ns, Low-power standby, 28-pin, 300-mil SK-DIP) 15 12.00 [0.472] 13.70 [0.539] 11.60 [0.457] 13.10 [0.516] 14 0.15 [0.006] 1.10 [0.043] 0.90 [0.035] 1 ...
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... SHARP Microelectronics of the Americas 5700 NW Pacific Rim Blvd. Camas, WA 98607, U.S.A. Phone: (360) 834-2500 Fax: (360) 834-8903 http://www.sharpsma.com EUROPE SHARP Microelectronics Europe Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Fax: (49) 40 2376-2232 http://www.sharpsme.com ASIA SHARP Corporation Integrated Circuits Group ...