TDGL007 Microchip Technology, TDGL007 Datasheet - Page 75

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TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
5.0
The dsPIC33FJXXXMCX06A/X08A/X10A devices con-
tain internal Flash program memory for storing and
executing application code. The memory is readable,
writable and erasable during normal operation over the
entire V
Flash memory can be programmed in two ways:
1.
2.
ICSP allows a dsPIC33FJXXXMCX06A/X08A/X10A
device to be serially programmed while in the end
application circuit. This is simply done with two lines for
programming clock and programming data (one of the
alternate programming pin pairs: PGECx/PGEDx), and
FIGURE 5-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
DD
2: Some registers and associated bits
FLASH PROGRAM MEMORY
range.
of the dsPIC33FJXXXMCX06A/X08A/
X10A family of devices. However, it is not
intended to be a comprehensive refer-
ence source. To complement the infor-
mation in this data sheet, refer to Section
5. “Flash Programming” (DS70191) in
the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
ADDRESSING FOR TABLE REGISTERS
dsPIC33FJXXXMCX06A/X08A/X10A
web
1/0
0
TBLPAG Reg
8 bits
site
in
Program Counter
24-bit EA
24 bits
three other lines for power (V
Master Clear (MCLR). This allows customers to
manufacture boards with unprogrammed devices and
then program the digital signal controller just before
shipping the product. This also allows the most recent
firmware or a custom firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data by blocks (or ‘rows’) of
64 instructions (192 bytes) at a time or by single
program memory word; the user can erase program
memory in blocks or ‘pages’ of 512 instructions
(1536 bytes) at a time.
5.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in
The TBLRDL and TBLWTL instructions are used to read
or write to bits<15:0> of program memory. TBLRDL and
TBLWTL can access program memory in both Word
and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
DD
Byte
Select
Figure
), ground (V
DS70594C-page 75
5-1.
SS
) and

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