TDGL007 Microchip Technology, TDGL007 Datasheet - Page 140

no-image

TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 8-5:
REGISTER 8-6:
DS70594C-page 140
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
Note 1:
R/W-0
R/W-0
R/W-0
U-0
2:
If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
Number of DMA transfers = CNT<9:0> + 1.
PAD<15:0>: Peripheral Address Register bits
Unimplemented: Read as ‘0’
CNT<9:0>: DMA Transfer Count Register bits
R/W-0
R/W-0
R/W-0
U-0
DMAxPAD: DMA CHANNEL x PERIPHERAL ADDRESS REGISTER
DMAxCNT: DMA CHANNEL x TRANSFER COUNT REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
CNT<7:0>
PAD<15:8>
PAD<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
R/W-0
R/W-0
R/W-0
(2)
U-0
R/W-0
R/W-0
R/W-0
U-0
© 2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
(1)
CNT<9:8>
(1)
R/W-0
(2)
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0

Related parts for TDGL007