TDGL007 Microchip Technology, TDGL007 Datasheet - Page 37

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

4.0
The dsPIC33FJXXXMCX06A/X08A/X10A architecture
features separate program and data memory spaces,
and buses. This architecture also allows the direct
access of program memory from the data space during
code execution.
FIGURE 4-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the fea-
Note:
MEMORY ORGANIZATION
tures of the dsPIC33FJXXXMCX06A/
X08A/X10A family of devices. How-
ever, it is not intended to be a compre-
hensive
complement the information in this data
sheet,
Memory” (DS70202) and Section 4.
“Program Memory” (DS70203) in the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip
(www.microchip.com).
dsPIC33FJ64MCXXXA
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Memory areas are not shown to scale.
(22K instructions)
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
refer
Registers
DEVID (2)
Reserved
Reserved
PROGRAM MEMORY MAP FOR dsPIC33FJXXXMCX06A/X08A/X10A DEVICES
reference
dsPIC33FJXXXMCX06A/X08A/X10A
to
Section
web
source.
3.
dsPIC33FJ128MCXXXA
“Data
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(44K instructions)
site
GOTO Instruction
Unimplemented
Reset Address
To
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Registers
Reserved
Reserved
Reserved
4.1
The
dsPIC33FJXXXMCX06A/X08A/X10A devices is 4M
instructions. The space is addressable by a 24-bit
value derived from either the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in
“Interfacing Program and Data Memory
User access to the program memory space is restricted
to the lower half of the address range (0x000000 to
0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space. Memory usage for the
dsPIC33FJXXXMCX06A/X08A/X10A family of devices
is shown in
program
Program Address Space
Figure
dsPIC33FJ256MCXXXA
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(88K instructions)
Unimplemented
GOTO
Reset Address
address
Flash Memory
User Program
4-1.
(Read ‘0’s)
DEVID (2)
Reserved
Registers
Reserved
Reserved
Instruction
memory
DS70594C-page 37
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x00ABFE
0x00AC00
0x0157FE
0x015800
0x02ABFE
0x02AC00
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80017
0xF80010
0xFEFFFE
0xFF0000
0xFFFFFE
space
Section 4.6
Spaces”.
of
the