TDGL007 Microchip Technology, TDGL007 Datasheet - Page 29

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

REGISTER 3-1:
© 2011 Microchip Technology Inc.
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
3:
4:
This bit may be read or cleared (not set).
The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU interrupt priority
level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when
IPL<3> = 1.
The IPL<2:0> Status bits are read only when NSTDIS = 1 (INTCON1<15>).
This bit may be read or cleared (not set). Clearing this bit will clear SA and SB.
IPL<2:0>: CPU Interrupt Priority Level Status bits
111 = CPU interrupt priority level is 7 (15), user interrupts disabled
110 = CPU interrupt priority level is 6 (14)
101 = CPU interrupt priority level is 5 (13)
100 = CPU interrupt priority level is 4 (12)
011 = CPU interrupt priority level is 3 (11)
010 = CPU interrupt priority level is 2 (10)
001 = CPU interrupt priority level is 1 (9)
000 = CPU interrupt priority level is 0 (8)
RA: REPEAT Loop Active bit
1 = REPEAT loop in progress
0 = REPEAT loop not in progress
N: MCU ALU Negative bit
1 = Result was negative
0 = Result was non-negative (zero or positive)
OV: MCU ALU Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the magnitude that
causes the sign bit to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: MCU ALU Zero bit
1 = An operation which affects the Z bit has set it at some time in the past
0 = The most recent operation which affects the Z bit has cleared it (i.e., a non-zero result)
C: MCU ALU Carry/Borrow bit
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
SR: CPU STATUS REGISTER (CONTINUED)
dsPIC33FJXXXMCX06A/X08A/X10A
(2)
DS70594C-page 29