TDGL007 Microchip Technology, TDGL007 Datasheet - Page 356

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

dsPIC33FJXXXMCX06A/X08A/X10A
Reset
Reset Sequence.................................................................. 87
Resets ................................................................................. 81
Revision History ................................................................ 350
S
Serial Peripheral Interface (SPI) ....................................... 197
Software Simulator (MPLAB SIM)..................................... 275
Software Stack Pointer, Frame Pointer
Special Features of the CPU............................................. 257
SPI Module
Symbols Used in Opcode Descriptions............................. 266
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 165
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 167
Timing Characteristics
DS70594C-page 356
IPC9 (Interrupt Priority Control 9) ............................. 123
NVMCOM (Flash Memory Control) ............................. 77
OCxCON (Output Compare x Control) ..................... 177
OSCCON (Oscillator Control) ................................... 148
OSCTUN (FRC Oscillator Tuning) ............................ 152
PLLFBD (PLL Feedback Divisor) .............................. 151
PMD1 (Peripheral Module Disable Control 1) ........... 157
PMD2 (Peripheral Module Disable Control 2) ........... 159
PMD3 (Peripheral Module Disable Control 3) ........... 161
PWMxCON1 (PWMx Control 1) ................................ 184
PWMxCON2 (PWMx Control 2) ................................ 185
PxDC1 (PWMx Duty Cycle 1) ................................... 191
PxDC2 (PWMx Duty Cycle 2) ................................... 191
PxDC3 (PWMx Duty Cycle 3) ................................... 192
PxDC4 (PWMx Duty Cycle 4) ................................... 192
PxDTCON1 (PWMx Dead-Time Control 1)............... 186
PxDTCON2 (PWMx Dead-Time Control 2)............... 187
PxFLTACON (PWMx Fault A Control) ...................... 188
PxFLTBCON (PWMx Fault B Control) ...................... 189
PxOVDCON (PWMx Override Control)..................... 190
PxSECMP (PWMx Special Event Compare) ............ 183
PxTCON (PWMx Time Base Control) ....................... 181
PxTMR (PWMx Timer Count Value) ......................... 182
PxTPER (PWMx Time Base Period)......................... 182
QEIxCON (QEIx Control) .......................................... 194
RCON (Reset Control) ................................................ 82
SPIxCON1 (SPIx Control 1) ...................................... 199
SPIxCON2 (SPIx Control 2) ...................................... 201
SPIxSTAT (SPIx Status and Control) ....................... 198
SR (CPU STATUS) ..................................................... 92
SR (CPU Status) ......................................................... 28
T1CON (Timer1 Control)........................................... 166
TxCON (T2CON, T4CON, T6CON or
TyCON (T3CON, T5CON, T7CON or
UxMODE (UARTx Mode) .......................................... 212
UxSTA (UARTx Status and Control) ......................... 214
Clock Source Selection ............................................... 84
Special Function Register States ................................ 86
Times .......................................................................... 84
CALL Stack Frame...................................................... 65
SPI1 Register Map ...................................................... 53
SPI2 Register Map ...................................................... 53
Register Map............................................................... 64
AC ..................................................................... 287, 330
CLKO and I/O ........................................................... 290
T8CON Control) ................................................ 170
T9CON Control) ................................................ 171
Timing Diagrams
Timing Requirements
Timing Specifications
U
UART Module
V
Voltage Regulator (On-Chip) ............................................ 262
10-Bit A/D Conversion (CHPS<1:0> = 01,
10-Bit A/D Conversion (CHPS<1:0> = 01,
12-Bit A/D Conversion (ASAM = 0, SSRC = 000) .... 321
CAN I/O .................................................................... 317
External Clock........................................................... 288
I2Cx Bus Data (Master Mode) .................................. 313
I2Cx Bus Data (Slave Mode) .................................... 315
I2Cx Bus Start/Stop Bits (Master Mode)................... 313
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 315
Input Capture (CAPx) ............................................... 295
Motor Control PWM .................................................. 297
Motor Control PWM Fault ......................................... 297
OC/PWM................................................................... 296
Output Compare (OCx)............................................. 295
QEA/QEB Input ........................................................ 298
QEI Module Index Pulse ........................................... 299
Reset, Watchdog Timer, Oscillator Start-up Timer
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 293
TimerQ (QEI Module) External Clock ....................... 300
ADC Conversion (10-bit mode)................................. 334
ADC Conversion (12-bit Mode)................................. 334
CLKO and I/O ........................................................... 290
External Clock........................................................... 288
Input Capture ............................................................ 295
SPIx Master Mode (CKE = 0) ................................... 331
SPIx Module Master Mode (CKE = 1) ...................... 331
SPIx Module Slave Mode (CKE = 0) ........................ 332
SPIx Module Slave Mode (CKE = 1) ........................ 332
10-Bit A/D Conversion Requirements....................... 325
12-Bit A/D Conversion Requirements....................... 322
CAN I/O Requirements ............................................. 317
I2Cx Bus Data Requirements (Master Mode)........... 314
I2Cx Bus Data Requirements (Slave Mode)............. 316
Motor Control PWM Requirements........................... 297
Output Compare Requirements................................ 295
PLL Clock ......................................................... 289, 330
QEI External Clock Requirements ............................ 300
QEI Index Pulse Requirements ................................ 299
Quadrature Decoder Requirements.......................... 298
Reset, Watchdog Timer, Oscillator Start-up Timer,
Simple OC/PWM Mode Requirements ..................... 296
Timer1 External Clock Requirements ....................... 293
Timer2, Timer4, Timer6 and Timer8 External
Timer3, Timer5, Timer7 and Timer9
UART1 Register Map.................................................. 53
UART2 Register Map.................................................. 53
SIMSAM = 0, ASAM = 0,
SSRC<2:0> = 000) ........................................... 323
SIMSAM = 0, ASAM = 1, SSRC<2:0> = 111,
SAMC<4:0> = 00001)....................................... 324
and Power-up Timer ......................................... 291
Power-up Timer and Brown-out
Reset Requirements......................................... 292
Clock Requirements ......................................... 294
External Clock Requirements ........................... 294
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