78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 6

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78M6610+PSU/EK#1

Manufacturer Part Number
78M6610+PSU/EK#1
Description
Development Boards & Kits - Other Processors 78M6610 EVAL KIT
Manufacturer
Maxim Integrated
Datasheet

Specifications of 78M6610+PSU/EK#1

Rohs
yes
Part # Aliases
90-X6610#KK1
An on-chip Power-On Reset (POR) block monitors the supply voltage (V
digital circuitry at power-on. Once V
falls below the minimum operating level.
Watchdog Timer (WDT)
A Watchdog Timer (WDT) block detects any software processing errors. The embedded software
reset can be forced by applying a low level to the RESET pin.
If the RESET pin is pulled low, all digital activities in the device stop, except the clock management
circuitry and oscillators, which continue to run. The external reset input is filtered to prevent spurious reset
events in noisy environments. The reset does not occur until RESET has been held low for at least 1 µs.
Once initiated, the reset mode persists until the RESET is set high and the reset timer times out (4096
clock cycles). At the completion of the reset sequence, the internal reset is released and the processor
(EMP) begins executing from address 0.
78M6610+PSU Data Sheet
1.2 Power-On Reset, WD Timer, and Reset Circuitry
Power-On Reset (POR)
triggers and initiates a reset sequence. It will also issue a reset to the digital circuitry if the supply voltage
periodically refreshes the free-running watchdog timer to prevent it from timing out. If the WDT times out,
it is an indication that software is no longer being executed in the intended sequence; thus, a system
reset is initiated.
External Reset Pin (RESET Pin)
The 24-pin QFN package provides a dedicated reset (RESET) pin. In addition to the internal sources, a
If not used, the RESET pin can be connected either directly or through a pull-up resistor to V
A simple connection diagram is shown in Figure 3.
6
78M6610+PSU/B
a) RESET External Connection Example
RESET
V
GNDD
3P3D
Figure 3: RESET Pin Connections
3P3D
10KΩ
GND
1nF
is above the minimum operating threshold, the POR circuit
Reset Switch
V
Manual
3P3
78M6610+PSU/B
b) Unused RESET Connection Example
3P3D
RESET
V
GNDD
3P3D
) and initializes the internal
3P3D
supply.
V
Rev 1
3P3
GND

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