78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 42

• Manufacturer Part Number: 78M6610+PSU/EK#1
• Description: Development Boards & Kits - Other Processors 78M6610 EVAL KIT
• Manufacturer: Maxim Integrated

Specifications of 78M6610+PSU/EK#1

• Rohs: yes
• Part # Aliases: 90-X6610#KK1

either a single command or multiple commands. The protocol allows for reading or writing one up to 252
bytes in a single operation. Following is the data access method for both read and write. Only the payload
is shown.
Device Selection
The device needs to be selected first using the following command:
78M6610+PSU Data Sheet
4.1.1 Command-Response Protocol Description
In this protocol, the host is the master and must initiate communications. The master should first select
the device that needs to communicate with, then set the device’s register address pointer and finally
performing the read or write operations. The sequence of operation is shown in the following diagram.
After sending the synchronization header code (0xAA), the master sends (in the following order) the byte
counts (bytes in payload), the payload and then the checksum that provides data integrity check. The
following figure shows a generic command packet generated from the master:
The payload contains commands, device address, registers address, data etc. The payload can contain
The 78M6610+PSU replies with an acknowledge message.
Once the device is selected, the SSB/DIR/SCL pin will be asserted (logic high), enabling the RS-485 bus
driver. The SSB/DIR/SCL pin will be asserted until the device is de-selected.
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Command
0xCF
PAYLOAD
SSI ID
Header
(0xAA)
Address Pointer
Target Device
Select Target
Set Register
Read/Write
Commands
De-Select
Count
Byte
Device
Payload
Checksum
Rev 1