78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 3

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78M6610+PSU/EK#1

Manufacturer Part Number
78M6610+PSU/EK#1
Description
Development Boards & Kits - Other Processors 78M6610 EVAL KIT
Manufacturer
Maxim Integrated
Datasheet

Specifications of 78M6610+PSU/EK#1

Rohs
yes
Part # Aliases
90-X6610#KK1
5
6
7
8
Revision History ......................................................................................................................................................... 63
Figures
Figure 1: IC Functional Block Diagram ........................................................................................................................... 4
Figure 2: XTAL Connection ............................................................................................................................................ 5
Figure 3: RESET Pin Connections ................................................................................................................................. 6
Figure 4: Typical Input Connections ............................................................................... Error! Bookmark not defined.
Figure 5: Analog Input Signal Conditioning .................................................................................................................... 9
Figure 6: HPF ................................................................................................................................................................. 9
Figure 7: RMS Calculations ......................................................................................................................................... 10
Figure 8: Power (Active, Reactive and Apparent) and Power Factor Calculation......................................................... 11
Figure 9: Voltage and Current Fundamental and Harmonic Calculations .................................................................... 12
Figure 10: Typical Measurement Location in Power Supplies ...................................................................................... 14
Figure 11: External Temperature Monitor .................................................................................................................... 15
Figure 12: Typical Sag Event ....................................................................................................................................... 16
Figure 13: Relay Control for In-rush Current Limitation Circuitry .................................................................................. 17
Figure 14: Relay Control .............................................................................................................................................. 18
Figure 15: UART Connections on a RS-485 Bus ......................................................................................................... 41
Figure 16: Single-Byte Transaction on the SPI Bus ..................................................................................................... 46
Figure 17: Write Access Example ................................................................................................................................ 48
Figure 18: Write Access with Interrupted SCK ............................................................................................................. 48
Figure 19: I
Figure 20: I
Figure 21: I
Figure 22: SPI Slave Port Timing ................................................................................................................................. 56
Figure 23: I
Rev 1
4.2
4.3
Electrical Specifications ................................................................................................................................... 53
5.1
5.2
5.3
5.4
5.5
Packaging .......................................................................................................................................................... 58
6.1
6.2
6.3
Ordering Information ........................................................................................................................................ 62
Contact Information .......................................................................................................................................... 62
2
2
2
2
SPI Interface ............................................................................................................................................. 46
I
Absolute Maximum Ratings ....................................................................................................................... 53
Recommended External Components....................................................................................................... 53
Recommended Operating Conditions ....................................................................................................... 53
Performance Specifications ....................................................................................................................... 54
Timing Specifications ................................................................................................................................ 56
24-pin QFN Pinout..................................................................................................................................... 58
16-Pin TSSOP Pinout ................................................................................................................................ 59
Package Outline ........................................................................................................................................ 60
C Bus Connection in Standard (A) and Isolated (B) Configuration ........................................................... 49
C Bus 3-byte Data Write ........................................................................................................................... 51
C Bus Multiple Sequential Register Write ................................................................................................. 51
C (Slave) Port Timing ............................................................................................................................... 57
4.1.2
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.5.1
5.5.2
5.5.3
2
C Interface .............................................................................................................................................. 49
Auto-Reported Data ..................................................................................................................... 45
Input Logic Levels ........................................................................................................................ 54
Output Logic Levels ..................................................................................................................... 54
RESET ......................................................................................................................................... 56
SPI Slave Port .............................................................................................................................. 56
I
Supply Current ............................................................................................................................. 54
Crystal Oscillator .......................................................................................................................... 54
Internal RC Oscillator ................................................................................................................... 54
ADC Converter, V
2
C Slave Port .............................................................................................................................. 57
3P3
Referenced ................................................................................................. 55
78M6610+PSU Data Sheet
3

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