78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 26

• Manufacturer Part Number: 78M6610+PSU/EK#1
• Description: Development Boards & Kits - Other Processors 78M6610 EVAL KIT
• Manufacturer: Maxim Integrated

Specifications of 78M6610+PSU/EK#1

• Rohs: yes
• Part # Aliases: 90-X6610#KK1

0x00
0x06
0x09
0x0C
0x0F
0x2D
0x51
0x54
0x69:8D
0x90:A2
0xA5
0xA8
0xAB
0xCC:DC
0xDB
0xDE
0xE1
0xE4
0xE7
0xEA
0xED
0xF0
0xF3
0xF6
0xF9
0xFC
0xFF
0x102
0x105
0x108
0x10B
0x111
78M6610+PSU Data Sheet
3.4 Input Registers (Setup and Calibration)
Input Registers are used to configure the device, issue commands etc. The input registers content can be
saved to flash memory the values restored as defaults upon power-on or reset.
26
Address
(Hex)
Command
PhaseComp
Alarm_Mask1 B24
Alarm_Set
Alarm_Reset
DevAddr
Alarm_Mask2 B24
Sticky
–
–
IrOff
VrOff
POff
RESERVED
Temp1Gain
Temp2Gain
HPFCoeffI
HPFCoeffV
Itarget
Vtarget
CalCyc
Igain
Vgain
Ioff
Voff
Tgain
Toffs
SysGain
Harm
Saccum
Accum
Frame
Variable
Name
Data
Type
B24
S.21
B24
B24
UINT24
B24
–
–
U.23
U.23
U.23
N/A
UINT24
UINT24
U.23
U.23
UINT24
UINT24
UINT24
U.21
U.21
S.23
S.23
U.24
U.24
S.23
UINT24
UINT24
UINT24
UINT48
Saved
Flash
N/A
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
N
N
N
Table 7: Input Registers
Command Register (see Command Register
Section)
Phase compensation (high-rate samples)
Alarm mask bits for ACFAULT pin
Sets corresponding alarm bits
Clears corresponding alarm bits
UART (MultiPoint) and I
Alarm mask bits for ACCRIT pin
Alarm bits to control auto-reset of alarm status
Alarm Limit Registers (See Section 3.6)
Alarm Holdoff Time Registers (See Section 3.6)
RMS Current Offset Adjust
RMS Voltage Offset Adjust
Power Offset Adjust
Registers 0xCC through 0xDC are reserved.
External Temperature Gain.
External Temperature Gain.
Current offset removal settling time
Voltage offset removal settling time
Calibration current gain target.
Calibration voltage gain target.
Number of Calibration cycles to average.
Current Gain setting (updated after calibration)
range 0 to 4
Voltage Gain Setting (updated after calibration).
Current offset (updated after calibration).
Voltage offset (updated after calibration).
Die temperature gain setting (updated after
calibration).
Die Temperature offset (updated after calibration). 287,831
Temperature compensated system gain (updated
after calibration).
Harmonic selector.
Accumulation interval for Sag and Surge.
Accumulation Interval for calculation (RMS, etc.).
Low rate frame number counter.
Description
2
C Address
0
0
N/A
0
0
1
1
168,000
130,000
5
1
1
N/A
N/A
701,233
N/A
1
40
400
N/A
(Decimal)
Default
Rev 1