78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 31

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78M6610+PSU/EK#1

Manufacturer Part Number
78M6610+PSU/EK#1
Description
Development Boards & Kits - Other Processors 78M6610 EVAL KIT
Manufacturer
Maxim Integrated
Datasheet

Specifications of 78M6610+PSU/EK#1

Rohs
yes
Part # Aliases
90-X6610#KK1
3.7.2 AlarmSticky Register (address 0x54)
The AlarmSticky register is an input register that allows configuring individual bits into the Alarms register
to hold the alarm status (“sticky”) until an AlarmReset command is issued. Each alarm can otherwise be
set to auto-reset at the completion of each accumulation interval.
The AlarmSticky register can be saved into flash memory.
Rev 1
17-12
Bit
23
22
21
19
18
11
10
9
8
7
6
5
4
3
2
1
0
ExtOvTemp1
ExtOvTemp2
OverCurrent
UnderTemp
OverPower
UnderFreq
OverTemp
UnderVolt
VdropOut
OverFreq
Not Used
Not Used
OverVolt
Vsurge
Alarm
Vsag
N/A
N/A
N/A
N/A
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
Not Used.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command is issued.
0 = Alarm bit is cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command.
0 = Alarm cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command.
0 = Alarm cleared at every accumulation Interval.
1 = Alarm bit is set until AlarmReset command.
0 = Alarm cleared at every accumulation Interval.
N/A
N/A
Not Used.
Table 11: AlarmSticky Register Bits Assignment
Function
78M6610+PSU Data Sheet
31

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