78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 46

• Manufacturer Part Number: 78M6610+PSU/EK#1
• Description: Development Boards & Kits - Other Processors 78M6610 EVAL KIT
• Manufacturer: Maxim Integrated

Specifications of 78M6610+PSU/EK#1

• Rohs: yes
• Part # Aliases: 90-X6610#KK1

Clock Polarity and Phase
SPI Protocol
The SPI allows access to read and write registers contained in a 256 word (24-bit) area of the on-chip
RAM. The address of each register specified in Section 3 must be divided by 3 for SPI access. The first
byte that the master needs to transmit to the 78M6610+PSU (slave) is the control byte. The control byte
allows setting the number of words to be transferred and the most significant bits of the register address:
78M6610+PSU Data Sheet
4.2 SPI Interface
The 78M6610+PSU can be configured as SPI slave. Once the SPI interface is activated, it utilizes the
following pins:
Figure 16
serial data clock and latched on the rising edge.
ADDR7 and ADDR6 bits select bit 7 and 6 of the 8-bit register address to be accessed by the following
data transactions.
NBRACC[3:0] represents the number of words (3-bytes) accesses to be performed by subsequent
read/write transactions. The actual number of data addresses accessed per data transaction is NBRACC
+ 1. For single address access, the field is set at 0. NBRACC is reset to 0 when the operation (multiple
reads or writes) is completed. NBRACC must be set to a non-zero value prior to each multiple word
transaction.
46
SDI (Master Output)
SCK
SDO (Master Input)
SSB (To Slave)
SSB:
SCK:
SDO:
SDI:
shows a single-byte transaction on the SPI bus. The data is shifted on the falling edge of the
Slave select (SS) is an input and active low signal.
Serial Data Clock (SCK) input.
Master Input/Slave Output (MISO), serial data output.
Master Output/Slave Input (MOSI), serial data input.
Bit 7
MSB
Figure 16: Single-Byte Transaction on the SPI Bus
MSB
NBRACC[3:0]
Bit 6
6
6
Bit 5
5
5
Bit 4
4
4
ADDR7
Bit 3
3
3
ADDR6
Bit 2
2
2
Bit 1
1
1
0
Bit 0
LSB
1
LSB
Rev 1