IS46TR16128A-15HBLA2 ISSI, IS46TR16128A-15HBLA2 Datasheet - Page 45

• Manufacturer Part Number: IS46TR16128A-15HBLA2
• Description: DRAM 2G, 1.5v, 1333MT/s 128Mx16 DDR3
• Manufacturer: ISSI

Specifications of IS46TR16128A-15HBLA2

• Rohs: yes
• Data Bus Width: 16 bit
• Organization: 128 M x 16
• Package / Case: FBGA-96
• Memory Size: 2 Gbit
• Maximum Clock Frequency: 933 MHz
• Access Time: 13.125 ns
• Supply Voltage - Max: 1.575 V
• Supply Voltage - Min: 1.425 V
• Maximum Operating Current: 65 mA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

IS43/46TR16128A, IS43/46TR16128AL,
IS43/46TR82560A, IS43/46TR82560AL
5.8.3 ODT Temperature and Voltage sensitivity
If temperature and/or voltage after calibration, the tolerance limits widen according to the following table.
Delta T = T - T(@calibration); Delta V = VDDQ - VDDQ(@calibration); VDD = VDDQ
5.8.3.1 ODT Sensitivity Definition
RTT
5.8.3.2 ODT Voltage and Temperature Sensitivity
dRTTdT
dRTTdV
Note: These parameters may not be subject to production test. They are verified by design and characterization
5.9 ODT Timing Definitions
5.9.1 Test Load for ODT Timings
Different than for timing measurements, the reference load for ODT timings is defined in the following figure.
5.9.2 ODT Timing Definitions
Definitions for t
Symbol
t
t
t
t
t
Reference Settings for ODT Timing Measurements
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A
11/14/2012
AON
AONPD
AOF
AOFPD
ADC
Measure voltage (VM) at test pin (midpoint) with no load:
Delta V
Measured Parameter
min
0.9 - dRTTdT*lDelta Tl - dRTTdV*lDelta Vl
M
= [2V
Begin Point Definition
Rising edge of CK - CK defined by the end point of ODTLon
Rising edge of CK - CK with ODT being first registered high
Rising edge of CK - CK defined by the end point of ODTLoff
Rising edge of CK - CK with ODT being first registered low
Rising edge of CK - CK defined by the end point of ODTLcnw,
ODTLcwn4, or ODTLcwn8
t
t
AONPD
AOFPD
t
AON
M
/ VDDQ -1] x 100
AON
, t
AONPD
, t
CK,CK#
AOF
, t
Min
0
0
AOFPD
RTT_Nom Setting
, and t
RZQ/12
RZQ/12
RZQ/4
RZQ/4
RZQ/4
Figure 5.9.1 ODT Timing Reference Load
ADC
are provided in the following table and subsequent figures.
Timing Reference Point
DUT
VDDQ
max
1.6 + dRTTdT*lDelta Tl + dRTTdV*lDelta Vl
RTT_Wr Setting
DQ,DM
DQS,
DQS#,
TDQS,
TDQS#
VSSQ
Max
1.5
0.15
NA
NA
NA
NA
NA
25ohm
End Point Definition
Extrapolated point at VSSQ
Extrapolated point at VSSQ
End point: Extrapolated point at V
End point: Extrapolated point at V
End point: Extrapolated point at V
V
RTT_Nom
VSW1[V]
respectively
0.05
0.10
0.05
0.10
0.05
VTT=VSSQ
Unit
%/°C
%/mV
Unit
RZQ/2,4,6,8,12
RTT_Nom
RTT_Nom
RTT_Wr
VSW2[V]
0.10
0.20
0.10
0.20
0.10
and
45