IS46TR16128A-125KBLA1-TR ISSI, IS46TR16128A-125KBLA1-TR Datasheet

IS46TR16128A-125KBLA1-TR

Manufacturer Part Number

IS46TR16128A-125KBLA1-TR

Description

DRAM 2G, 1.5V, 1600MT/s 128Mx16 DDR3

Manufacturer

ISSI

Datasheet

1.IS46TR16128A-125KBLA1-TR.pdf (82 pages)

Specifications of IS46TR16128A-125KBLA1-TR

Rohs

yes

Data Bus Width

16 bit

Organization

128 M x 16

Package / Case

FBGA-96

Memory Size

2 Gbit

Maximum Clock Frequency

933 MHz

Access Time

13.125 ns

Supply Voltage - Max

1.575 V

Supply Voltage - Min

1.425 V

Maximum Operating Current

70 mA

Maximum Operating Temperature

+ 95 C

Minimum Operating Temperature

- 40 C

Mounting Style

SMD/SMT

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without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised

to obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product

can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use

in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

IS43/46TR16128A, IS43/46TR16128AL,

IS43/46TR82560A, IS43/46TR82560AL

256Mx8, 128Mx16 2Gb DDR3 SDRAM

FEATURES

OPTIONS

SPEED BIN

Note:

Faster speed options are backward compatible to slower speed options.

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 00A

11/14/2012

JEDEC Speed Grade



CL-nRCD-nRP

tRCD,tRP(min)



Speed Option

Standard Voltage: V

Low Voltage (L): V

High speed data transfer rates with system

frequency up to 933 MHz

8 internal banks for concurrent operation

8n-Bit pre-fetch architecture

Programmable CAS Latency

Programmable Additive Latency: 0, CL-1,CL-2

Programmable CAS WRITE latency (CWL) based

on tCK

Programmable Burst Length: 4 and 8

Programmable Burst Sequence: Sequential or

Interleave

BL switch on the fly

Auto Self Refresh(ASR)

Self Refresh Temperature(SRT)

Configuration:

256Mx8

128Mx16

Package:

96-ball FBGA (9mm x 13mm) for x16

78-ball FBGA (8mm x 10.5mm) for x8

and V

DDR3-1066F

13.125

and V

7-7-7

187F

DDQ

= 1.35V + 0.1V, -0.067V

DDQ

= 1.5V ± 0.075V

DDR3-1333H

13.125

9-9-9

15H

DDR3-1600K

11-11-11

13.125

125K

ADDRESS TABLE

Parameter

Row Addressing

Column Addressing

Bank Addressing

Page size

Auto Precharge

Addressing

BL switch on the fly



Refresh Interval:

Partial Array Self Refresh

Asynchronous RESET pin

TDQS (Termination Data Strobe) supported (x8

only)

OCD (Off-Chip Driver Impedance Adjustment)

Dynamic ODT (On-Die Termination)

Driver strength : RZQ/7, RZQ/6 (RZQ = 240 Ω)

Write Leveling

Operating temperature:

DDR3-1866M

7.8 us (8192 cycles/64 ms) Tc= -40°C to 85°C

3.9 us (8192 cycles/32 ms) Tc= 85°C to 105°C

Commercial (T

Industrial (T

Automotive, A1 (T

Automotive, A2 (T

13-13-13

107M

13.91

= -40°C to +95°C)

A12/BC#

256Mx8

A10/AP

A0-A14

ADVANCED INFORMATION

= 0°C to +95°C)

Units

A0-A9

BA0-2

tCK

1KB

= -40°C to +95°C)

= -40°C to +105°C)

NOVEMBER 2012

128Mx16

A12/BC#

A0-A13

A10/AP

A0-A9

BA0-2

2KB

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