NT5DS16M16CS NANOAMP [NanoAmp Solutions, Inc.], NT5DS16M16CS Datasheet - Page 38

• Manufacturer Part Number: NT5DS16M16CS
• Description: 256Mb DDR Synchronous DRAM
• Manufacturer: NANOAMP [NanoAmp Solutions, Inc.]

NanoAmp Solutions, Inc.
DOC # 14-02-044 Rev A ECN # 01-1116
The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com
Write to Read: Interrupting (CAS Latency = 2; Burst Length = 8)
Command
Command
Address
Address
DQS
DI a-b = data in for bank a, column b.
An interrupted burst is shown, 4 data elements are written.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
t
The Read command masks the last 2 data elements in the burst.
A10 is Low with the Write command (Auto Precharge is disabled).
The Read and Write commands are not necessarily to the same bank.
1 = These bits are incorrectly written into the memory array if DM is low.
DQS
DM
DQ
WTR
DQ
DM
CK
CK
CK
CK
is referenced from the first positive CK edge after the last data in pair.
BAa, COL b
BAa, COL b
Write
Write
T1
T1
t
DQSS
(max)
DI a-b
t
DQSS
NOP
NOP
T2
T2
DIa- b
(min)
NOP
NOP
T3
T3
NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT
NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS
1
NOP
NOP
T4
T4
1
1
t
WTR
t
WTR
BAa, COL n
1
BAa, COL n
Read
Read
T5
Maximum D
T5
Minimum D
CL = 2
CL = 2
QSS
QSS
NOP
NOP
Don’t Care
T6
T6
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