CN8330EPD CONEXANT [Conexant Systems, Inc], CN8330EPD Datasheet - Page 71
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CN8330EPD
Manufacturer Part Number
CN8330EPD
Description
DS3/E3 Framer with 52 Mbps HDLC Controller
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.CN8330EPD.pdf
(101 pages)
- Current page: 71 of 101
- Download datasheet (570Kb)
CN8330
DS3/E3 Framer with 52 Mbps HDLC Controller
DS3FEBE[7:0]
The DS3/E3 LCV Counter is a 16-bit counter with the low byte located at address 0x25 and the high byte
located at address 0x26. If the interrupt for the DS3/E3 LCV Counter is not enabled, the counter will saturate at
65535 and the saturation indication will appear in the Counter Interrupt Status Register [SR01;0x11]. If the
interrupt is enabled, the counter will roll over and continue counting as for the 8-bit counters. In DS3 mode, this
counter increments upon each occurrence of a Bipolar Violation (BPV) and each sequence of three or more
zeroes. In E3 mode, it increments only upon each occurrence of an LCV per ITU-T O.161 (an LCV is defined
as two consecutive BPVs of the same polarity).
100441E
0x24—DS3 FEBE Event Counter (SR11)
0x25,0x26—DS3/E3 LCV Counter—Low and High Bytes (SR12,SR13)
DS3FEBE[7]
LCVCtr[15]
LCVCtr[7]
15
7
7
DS3FEBE[6]
LCVCtr[14]
DS3 FEBE Event Counter— Increments for each M-frame where any C-bit in subframe 4
is zero.
LCVCtr[6]
14
6
6
DS3FEBE[5]
LCVCtr[13]
LCVCtr[5]
13
5
5
DS3FEBE[4]
LCVCtr[12]
LCVCtr[4]
12
4
4
Conexant
DS3FEBE[3]
LCVCtr[11]
LCVCtr[3]
11
3
3
DS3FEBE[2]
LCVCtr[10]
LCVCtr[2]
10
2
2
DS3FEBE[1]
LCVCtr[1]
LCVCtr[9]
1
1
9
3.2 Status Registers
3.0 Registers
DS3FEBE[0]
LCVCtr[0]
LCVCtr[8]
0
0
8
3-13
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