ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 74

• Manufacturer Part Number: ZL30226/GA
• Description: 4/8/16 Port IMA/TC PHY Device for xDSL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Address (Hex):
Direct access
Reset Value (Bin):
Address (Hex):
Direct access
Reset Value (Hex):
15:12
Bit #
7:0
15
14
13
12
11
10
11
10
...
9
8
7
6
1
0
9
8
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
...
R
R
Reserved.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
16/8-bit mode selection bit for the RX UTOPIA data bus. When set the RX UTOPIA
interface is operating in 8-bit mode, when reset it is operating in 16-bit mode.
Reserved. Write 0 for normal operation.
Reset UTOPIA RX state machines when set to 1.
Reserved. Write 0 for normal operation.
Enable UTOPIA PHY address of IMA Group 7. A 1 enables the PHY port Address.
Enable UTOPIA PHY address of IMA Group 6. A 1 enables the PHY port Address.
...
Enable UTOPIA PHY address of IMA Group 1. A 1 enables the PHY port Address.
Enable UTOPIA PHY address of IMA Group 0. A 1 enables the PHY port Address.
Unused. Read all 0’s.
Reserved. Write 0 for normal operation
Reserved. Write 0 for normal operation
Write 0 for normal operation, 1 to tristate parity.
Parity Bit. EVEN parity is selected when this bit is set.
ODD parity is selected when this bit is cleared.
User Defined Byte. This byte is inserted into the sixth byte of the header when cells are
being output in 16-bit mode.
0x0011 (1 reg)
1 register to enable the IMA Groups.For ZL30226 groups 0, 1, 2 and 3 are used.
X000000000000000
0x0012 (1 reg)
1 register which contains the User Defined Byte. This byte is inserted into the
sixth byte of the header when operating in sixteen-bit mode.
0000
Table 9 - UTOPIA Output Group PHY Enable Register
Table 10 - UTOPIA Output User Defined Byte
Zarlink Semiconductor Inc.
ZL30226/7/8
74
Description
Description
Data Sheet