RG82845M Intel, RG82845M Datasheet - Page 98

• Manufacturer Part Number: RG82845M
• Description: Chipset Memory Controller Hub Mobile
• Manufacturer: Intel

Intel
3.8.19.
98
®
82845MP/82845MZ Chipset-Mobile (MCH-M)
Device #1
Address Offset:
PMBASE1 – Prefetchable Memory Base Address Register –
Default Value:
Access:
Size:
This register controls the host to AGP prefetchable memory accesses routing based on the following
formula:
The upper 12 bits of the register are read/write and correspond to the upper 12 address bits A[31:20] of
the 32-bit address. The bottom 4 bits of this register are read-only and return zeros when read. The
configuration software must initialize this register. For the purpose of address decode address bits
A[19:0] are assumed to be 0. Thus, the bottom of the defined memory address range will be aligned to a
1-MB boundary.
15:4
3:0
Bit
PREFETCHABLE_MEMORY_BASE1=< address =<PREFETCHABLE_MEMORY_LIMIT1
Prefetchable Memory Address Base 1(PMEM_BASE1). Corresponds to A[31:20] of the memory
address.
Reserved
24-25h
FFF0h
Read/Write, Read Only
16 bits
Datasheet
Description
250687-002
R