RG82845M Intel, RG82845M Datasheet - Page 83

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RG82845M

Manufacturer Part Number
RG82845M
Description
Chipset Memory Controller Hub Mobile
Manufacturer
Intel
Datasheet

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3.7.37.
3.7.38.
250687-002
Note: An error can generate one and only one error message via the hub interface A. It is software’s
Note: An error can generate one and only one error message via the hub interface A. It is software’s
R
Address Offset:
Address Offset:
SMICMD – SMI Command Register – Device #0
Default Value:
Access:
Size:
This register enables various errors to generate an SMI message via the hub interface A.
responsibility to make sure that when an SMI error message is enabled for an error condition; SERR and
SCI error messages are disabled for that same error condition.
SCICMD – SCI Command Register – Device #0
Default Value:
Access:
Size:
This register enables various errors to generate a SCI message via the hub interface A.
responsibility to make sure that when an SCI error message is enabled for an error condition, SERR and
SMI error messages are disabled for that same error condition.
15:2
15:2
Bit
Bit
1
0
1
0
Reserved
SMI on Multiple-bit DRAM ECC Error (DMERR): When this bit is set, the generation of the hub
interface A SMI message is enabled when the MCH-M DRAM controller detects a multiple-bit error.
For systems not supporting ECC this bit must be disabled.
SMI on Single-bit ECC Error (DSERR): When this bit is set, the generation of the hub interface A
SMI message is enabled when the MCH-M DRAM controller detects a single bit error. For systems
that do not support ECC this bit must be disabled.
Reserved
SCI on Multiple-Bit DRAM ECC Error (DMERR): When this bit is set, the generation of the hub
interface A SCI message is enabled when the MCH-M DRAM controller detects a multiple-bit error.
For systems not supporting ECC this bit must be disabled.
SCI on Single-bit ECC Error (DSERR): When this bit is set, the generation of the hub interface A
SCI message is enabled when the MCH-M DRAM controller detects a single bit error. For systems
that do not support ECC this bit must be disabled.
CC-CDh
0000h
Read/Write, Read Only
16 bits
CE-CDh
0000h
Read/Write, Read Only
16 bits
Datasheet
Intel
®
Description
Description
82845MP/82845MZ Chipset-Mobile (MCH-M)
83

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