AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 307
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 307 of 309
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8/01/00
Receive Clock . . . . . . . . . . . . . . . . . . . . . . . .30
Receive Data . . . . . . . . . . . . . . . . . . . . . . . . .30
Receive Data Valid 30
Receive Descriptor (SWSTYLE = 0) . . . . .227
Receive Descriptor (SWSTYLE = 2) . . . . .227
Receive Descriptor (SWSTYLE = 3) . . . . .228
Receive Descriptor (SWSTYLE = 4) . . . . .228
Receive Descriptor (SWSTYLE = 5) . . . . .228
Receive Descriptors . . . . . . . . . . . . . . . . . . .227
Receive Error . . . . . . . . . . . . . . . . . . . . . . . . .30
Receive Exception Conditions . . . . . . . . . . .73
Receive FCS Checking . . . . . . . . . . . . . . . . .73
Receive Frame Tag Data . . . . . . . . . . . . . . . .31
Receive Frame Tag Enable . . . . . . . . . . . . . .31
Receive Frame Tag Timing with
Media Independent Interface . . . . . . . .281, 283
Receive Function Programming . . . . . . . . . .71
Receive Operation . . . . . . . . . . . . . . . . . . . . .71
Receive Polling . . . . . . . . . . . . . . . . . . . . . . .65
Receive Protect Register . . . . . . . . . . . . . . .165
Receive Ring Base Address Register . . . . .128
Receive Timing . . . . . . . . . . . . . . . . . .278, 279
Receive Watermark Programming . . . . . . .192
Register Bit Cross Reference . . . . . . . . . . . .253
Register initialization . . . . . . . . . . . . . . . . . .111
Register Programming Summary . . . . . . . .262
Register Summary . . . . . . . . . . . . . . . . . . . .245
Regulating Network Traffic . . . . . . . . . . . . .87
Re-Initialization . . . . . . . . . . . . . . . . . . . . . . .59
Reject Timing - External PHY MII
@ 2.5 MHz . . . . . . . . . . . . . . . . . . . . . . . . .282
Reject Timing - External PHY MII
@ 25 MHz . . . . . . . . . . . . . . . . . . . . . . . . . .281
Remote Wake Up . . . . . . . . . . . . . . . . . . . . .26
REQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Reset Register . . . . . . . . . . . . . . . . . . . . . . .107
RLEN and TLEN . . . . . . . . . . . . . . . . . . . . .225
ROM_CFG
RST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Run and Suspend . . . . . . . . . . . . . . . . . . . . . .60
Running registers . . . . . . . . . . . . . . . . . . . . .111
RWU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
RX_CLK . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
RX_DV . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
RX_ER . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
RXD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
ROM Base Address Configuration
Register . . . . . . . . . . . . . . . . . . . . . . . . . .166
P R E L I M I N A R Y
Am79C976
S
RXFRTGD . . . . . . . . . . . . . . . . . . . . . . . . . .31
RXFRTGE . . . . . . . . . . . . . . . . . . . . . . . . . . .31
S_RESET . . . . . . . . . . . . . . . . . . . . . . . . . . .105
SERR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-2
Setup and Hold Timing . . . . . . . . . . . . . . . .269
Setup registers . . . . . . . . . . . . . . . . . . . . . . .111
SFBD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SID_A
Slave Bus Interface Unit . . . . . . . . . . . . . . . .33
Slave Configuration Read . . . . . . . . . . . . . . 34
Slave Configuration Transfers . . . . . . . . . . . .33
Slave Configuration Write . . . . . . . . . . . . . . .34
Slave Cycle Data Parity Error Response . . . .40
Slave I/O Transfers . . . . . . . . . . . . . . . . . . . . 33
Slave Read Using I/O Command . . . . . . . . . 35
Slave Write Using Memory Command . . . . . 36
Software . . . . . . . . . . . . . . . . . . . . . . . . . . . .214
Software Access . . . . . . . . . . . . . . . . . . . . .106
Software Interface . . . . . . . . . . . . . . . . . . . . .32
Software Interrupt Timer . . . . . . . . . . . . . . . .66
Software Timer Value Register . . . . . . . . . .169
Some Examples of LAPP Descriptor
Interaction . . . . . . . . . . . . . . . . . . . . . . . . . .A-6
SR2
SRAM Boundary Register . . . . . . . . . . . . . . 167
SRAM Configuration . . . . . . . . . . . . . . . . . . 95
SRAM Size Register . . . . . . . . . . . . . . . . . . 167
Start Frame-Byte Delimiter . . . . . . . . . . . . . .30
STAT0
Status Register (Register 1) . . . . . . . . . . . . . B-2
STOP . . . . . . . . . . . . . . . . . . . . . . . . . . .25, 105
Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Supported Instructions . . . . . . . . . . . . . . . . . 103
SVID_A
Switching Characteristics
Switching Test Circuits . . . . . . . . . . . . . . . . 271
PCI Subsystem ID Alias Register . . . . . .166
Initialization Block Address 1 . . . . . . . . .175
Status0 . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
PCI Subsystem Vendor ID Alias
Register . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Bus Interface . . . . . . . . . . . . . . . . . . . . . . 269
EEPROM Interface . . . . . . . . . . . . . . . . . 274
External Address Detection
Interface . . . . . . . . . . . . . . . . . . . . 281, 282
JTAG Timing . . . . . . . . . . . . . . . . . . . . . . 276
Media Independent Interface . . . . . . . . . .278
INDEX-8
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