AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 185

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16
15-0
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16
15-0
8/01/00
PADR[31:16]Physical
PADR[47:32]Physical
Name
RES
Name
RES
or a direct register write has been
performed on this register.
Read/Write accessible. These
bits are cleared by H_RESET but
are unaffected by S_RESET, or
STOP.
zeros and read as undefined.
PADR[31:16]. The contents of
this register are loaded from EE-
PROM after H_RESET or by an
EEPROM
(PREAD, BCR19, bit 14). If the
EEPROM is not present, the con-
tents of this register are unde-
fined.
from the initialization block after
the INIT bit in CSR0 has been set
or a direct register write has been
performed on this register.
Read/Write accessible. These
bits are cleared by H_RESET but
are unaffected by S_RESET, or
STOP.
zeros and read as undefined.
PADR[47:32].The
this register are loaded from
EEPROM after H_RESET or by
an EEPROM read command
(PREAD, BCR19, bit 14). If the
EEPROM is not present, the con-
tents of this register are unde-
fined.
from the initialization block after
Reserved locations. Written as
This register can also be loaded
Reserved locations. Written as
This register can also be loaded
Description
Description
Address
Address
read
contents
P R E L I M I N A R Y
command
Register,
Register,
Am79C976
of
This register’s fields are loaded during the Am79C976
controller initialization routine with the corresponding
Initialization Block values, or when a direct register write
has been performed on this register.
Bit
31-16 RES
15
14
13
12-9
8-7
6
PORTSEL[1:0]Obsolete function. Writing has
Name
PROM
DRCVBC
DRCVPA
RES
INTL
Read/Write accessible. These
bits are cleared by H_RESET but
are unaffected by S_RESET, or
STOP.
Read/Write accessible.
Read/Write accessible.
Read/Write accessible.
the INIT bit in CSR0 has been set
or a direct register write has been
performed on this register.
zeros and read as undefined.
PROM = 1, all incoming receive
frames are accepted.
Disable
When
Am79C976 controller from re-
ceiving
Used for protocols that do not
support broadcast addressing,
except as a function of multicast.
DRCVBC is cleared by activation
of
(broadcast messages will be re-
ceived) and is unaffected by
STOP.
Disable Receive Physical Ad-
dress. When set, the physical ad-
dress detection (Station or node
ID) of the Am79C976 controller
will be disabled. Frames ad-
dressed to the node’s individual
physical address will not be rec-
ognized.
Reserved locations. Written as
zeros and read as undefined.
no effect. Read as undefined.
Obsolete function. Writing has no
effect. Read as undefined.
Description
Reserved locations. Written as
Promiscuous
H_RESET
broadcast
set,
Receive
Mode.
disables
or
messages.
Broadcast.
S_RESET
When
185
the