PSD4235G2V-10U STMICROELECTRONICS [STMicroelectronics], PSD4235G2V-10U Datasheet - Page 45

• Manufacturer Part Number: PSD4235G2V-10U
• Description: Flash In-System Programmable (ISP) Peripherals for 16-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Input Macrocells (IMC)
The CPLD has 24 Input Macrocells (IMC), one for
each pin on Ports A, B, and C. The architecture of
the Input Macrocells (IMC) is shown in Figure 16.
The Input Macrocells (IMC) are individually config-
urable, and can be used as a latch, register, or to
pass incoming Port signals prior to driving them
onto the PLD input bus. The outputs of the Input
Macrocells (IMC) can be read by the MCU through
the internal data bus.
The enable for the latch and clock for the register
are driven by a multiplexer whose inputs are a
product term from the CPLD AND Array or the
MCU Address Strobe (ALE/AS). Each product
term output is used to latch or clock four Input
Macrocells (IMC). Port inputs 3-0 can be con-
trolled by one product term and 7-4 by another.
Configurations for the Input Macrocells (IMC) are
specified by PSDsoft (see Application Note
AN1171 ). Outputs of the Input Macrocells (IMC)
can be read by the MCU via the IMC buffer. See
Figure 21, page 51 to Figure 26, page 57 for ex-
amples of the basic connections between the PSD
and some popular MCUs. The PSD Control input
pins are labeled as to the MCU function for which
Figure 16. Input Macrocell
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
ENABLE ( .OE )
PT
PT
FEEDBACK
MACROCELLS A
MACROCELLS B
OUTPUT
INPUT MACROCELL _ RD
AND
MUX
D FF
LATCH
Q
Q
G
D
D
they are configured. The MCU bus interface is
specified using the “I/O Ports”, on page 16.
Input Macrocells (IMC) can use Address Strobe
(ALE/AS, PD0) to latch address bits higher than
A15. Any latched addresses are routed to the
PLDs as inputs.
Input Macrocells (IMC) are particularly useful with
handshaking communication applications where
two processors pass data back and forth through
a common mailbox. Figure 18, page 46 shows a
typical configuration where the Master MCU writes
to the Port A Data Out Register. This, in turn, can
be read by the Slave MCU via the activation of the
“Slave-READ” output enable product term.
The Slave can also write to the Port A Input Mac-
rocells (IMC) and the Master can then read the In-
put Macrocells (IMC) directly.
Note that the “Slave-READ” and “Slave-Wr” sig-
nals are product terms that are derived from the
Slave MCU inputs READ Strobe (RD, CNTL1),
WRITE
Slave_CS.
INTERNAL DATA BUS
INPUT MACROCELL
Strobe
MUX
ALE/AS
PT
DIRECTION
REGISTER
(WR/WRL,
DRIVER
PORT
PSD4256G6V
CNTL0),
AI04926
I/O PIN
45/100
and