PSD4235G2V-10U STMICROELECTRONICS [STMicroelectronics], PSD4235G2V-10U Datasheet - Page 41

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PSD4235G2V-10U

Manufacturer Part Number
PSD4235G2V-10U
Description
Flash In-System Programmable (ISP) Peripherals for 16-bit MCUs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
COMPLEX PLD (CPLD)
The CPLD can be used to implement system logic
functions, such as loadable counters and shift reg-
isters, system mailboxes, handshaking protocols,
state machines, and random logic. The CPLD can
also be used to generate eight External Chip Se-
lect (ECS0-ECS7), routed to Port C or Port F.
Although External Chip Select (ECS0-ECS7) can
be produced by any Output Macrocell (OMC),
these eight External Chip Select (ECS0-ECS7) on
Port C or Port F do not consume any Output Mac-
rocells (OMC).
As shown in Figure 14, the CPLD has the following
blocks:
Figure 14. Macrocell and I/O Port
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
24 Input Macrocells (IMC)
16 Output Macrocells (OMC)
Product Term Allocator
PRODUCT TERMS
MACROCELLS
FROM OTHER
PRODUCT TERM
PT CLEAR
GLOBAL
CLOCK
CLOCK
SELECT
PRODUCT TERMS
PT
CLOCK
ALLOCATOR
PT INPUT LATCH GATE/CLOCK
CPLD MACROCELLS
UP TO 10
POLARITY
SELECT
PT OUTPUT ENABLE ( OE )
MACROCELL FEEDBACK
I/O PORT INPUT
PT PRESET
CK
PR DI LD
D/T/JK FF
D/T
SELECT
MCU ADDRESS / DATA BUS
MCU DATA IN
CL
Q
MCU LOAD
SELECT
COMB.
/REG
CONTROL
MACROCELL
Each of the blocks are described in the sections
that follow.
The Input Macrocells (IMC) and Output Macrocells
(OMC) are connected to the PSD internal data bus
and can be directly accessed by the MCU. This
enables the MCU software to load data into the
Output Macrocells (OMC) or read data from both
the Input and Output Macrocells (IMC and OMC).
This feature allows efficient implementation of sys-
tem logic and eliminates the need to connect the
data bus to the AND Array as required in most
standard PLD macrocell architectures.
DATA
LOAD
OUT TO
MCU
AND Array capable of generating up to 196
product terms
Four I/O Ports.
ALE/AS
I/O PORTS
ADDRESS OUT
DATA
CPLD OUTPUT
WR
INPUT MACROCELLS
WR
PDR
LATCHED
D
D
REG.
INPUT
DIR
Q
Q
MUX
SELECT
Q
Q D
D
G
PSD4256G6V
AI04945
I/O PIN
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