PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 86

• Manufacturer Part Number: PSD813F1
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

CPLD Micro Cell Synchronous Clock Mode Timing
NOTES: 1. Fast Slew Rate output available on PA[3:0], PB[3:0], and PD[2:0].
Symbol
f
t
t
t
t
t
t
t
MAX
S
H
CH
CL
CO
ARD
MIN
2. CLKIN t
*
ZPSD versions only.
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback
( f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
CNT
)
CLCL
Parameter
= t
CH
+ t
CL
.
1/(t
1/(t
1/(t
Clock Input
Clock Input
Clock Input
Any Micro Cell
t
C H
Conditions
S
S
C H
+ t
+ t
+ t
CL
+ t
CO
CO
CL
(Note 2)
)
–10)
)
Min
15
10
10
20
0
(5 V ± 10% Versions)
-90
30.30
43.48
50.00
Max
18
16
Min
18
12
12
24
0
-12
41.67
Max
26.3
35.7
20
18
Min
20
15
15
30
0
-15
31.25
Max
23.8
33.3
22
22
Add 2 Add 10
Add 2
Fast
Aloc
PT
TURBO
OFF *
(Note 1)
Sub 2
Slew
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns