PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 61

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PSD813F1

Manufacturer Part Number
PSD813F1
Description
Flash In-System Programmable ISP Peripherals For 8-bit MCUs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Preliminary
The
PSD813F1
Functional
Blocks
(cont.)
Figure 25. Peripheral I/O Mode
9.4.3 Port Configuration Registers (PCRs)
Each port has a set of PCRs used for configuration. The contents of the registers can be
accessed by the microcontroller through normal read/write bus cycles at the addresses
given in Table 7. The addresses in Table 7 are the offsets in hex from the base of the
CSIOP register.
The pins of a port are individually configurable and each bit in the register controls its
respective pin. For example, Bit 0 in a register refers to Bit 0 of its port. The three PCRs,
shown in Table 23, are used for setting the port configurations. The default power-up state
for each register in Table 23 is 00h.
Table 23. Port Configuration Registers
*
NOTE: See Table 27 for Drive Register bit definition.
Register Name
Control
Direction
Drive Select*
RD
PSEL0
PSEL1
WR
VM REGISTER BIT 7
A,B
A,B,C,D
A,B,C,D
Port
PSEL
MCU Access
Write/Read
Write/Read
Write/Read
DATA BUS
D0 - D7
PA0 - PA7
PSD813F1-A
57

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