PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 22

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PSD813F1

Manufacturer Part Number
PSD813F1
Description
Flash In-System Programmable ISP Peripherals For 8-bit MCUs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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The
PSD813F1
Functional
Blocks
(cont.)
18
PSD813F1-A
Table 9. Instructions
NOTES: 1. Additional sectors to be erased must be entered within 80 µs. A Sector Address is any address within
Read
Flash
Identifier
(Note 3, 5)
Read OTP Row
(Note 4)
Read Sector
Protection
Status
(Notes 3, 5)
Program a
Flash Byte
(Note 5)
Erase one
Flash Sector
(Note 5)
Erase the
whole Flash
(Note 5)
Suspend Sector
Erase
(Note 5)
Resume
Sector Erase
(Note 5)
EEPROM Power
Down (Note 4)
SDP Enable/
EEPROM Write
(Note 4)
SDP Disable
(Note 4)
Write in OTP
Row (Notes 4, 6)
Return (from OTP
Read or EEPROM
Power-Down)
(Note 4)
Reset
(Notes 3, 5)
Reset
(short instruction)
(Note 5)
Instruction
2. Flash and EEPROM Sector Selects are active high. Addresses A15-A12 are don’t cares in Instruction
3. The Reset instruction is required to return to the normal read array mode if DQ5 goes high or after
4. The MCU cannot invoke these instructions while executing code from EEPROM. The MCU must be
5. The MCU cannot invoke these instructions while executing code from the same Flash memory for
6. Writing to OTP Row is allowed only when SDP mode is disabled.
the Sector.
Bus Cycles.
reading the Flash Identifier or Protection status.
operating from some other memory when these instructions are performed.
which the instruction is intended. The MCU must operate from some other memory when these
instructions are executed.
EEPROM
Sector
Select
(EESi)
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
(Note 2)
Sector
Select
Flash
(FSi)
1
0
1
1
1
1
1
1
0
0
0
0
0
1
1
Cycle 1 Cycle 2 Cycle 3
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh @X555h
@X555h @XAAAh
address
address
address
address
F0h @
@ any
@ any
@ any
AAh
AAh
AAh
AAh
AAh
AAh
AAh
AAh
AAh
AAh
AAh
B0h
30h
F0h
any
55h
55h
55h
55h
55h
55h
55h
55h
55h
55h
55h
address
@ any
A0h
A0h
B0h
F0h
90h
90h
90h
80h
80h
30h
80h
@ address
(A6,A1,A0
(A6,A1,A0
Cycle 4
@X555h
@X555h
@X555h
identifier
identifier
at 0,0,1)
at 0,1,0)
byte 1
byte 1
byte 1
Read
Read
Read
Write
Write
Data
with
with
AAh
AAh
AAh
@XAAAh
@XAAAh
@XAAAh
Cycle5
byte 2
byte 2
byte 2
Read
Write
Write
55h
55h
55h
@ Sector
Cycle 6
@X555h
@X555h
address
30h
10h
20h
Preliminary
address(1)
@ Sector
Cycle 7
byte N
byte N
byte N
Read
Write
Write
30h

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