PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 78

• Manufacturer Part Number: PSD813F1
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

The
PSD813F1
Functional
Blocks
(cont.)
74
PSD813F1-A
9.6.1 Standard JTAG Signals
The standard JTAG signals (TMS, TCK, TDI, and TDO) can be enabled by any of three
different conditions that are logically ORed. When enabled, TDI, TDO, TCK, and TMS are
inputs, waiting for a serial command from an external JTAG controller device (such as
FlashLink or Automated Test Equipment). When the enabling command is received from the
external JTAG controller, TDO becomes an output and the JTAG channel is fully functional
inside the PSD. The same command that enables the JTAG channel may optionally enable
the two additional JTAG pins, TSTAT and TERR.
The following symbolic logic equation specifies the conditions enabling the four basic
JTAG pins (TMS, TCK, TDI, and TDO) on their respective Port C pins. For purposes of
discussion, the logic label JTAG_ON will be used. When JTAG_ON is true, the four pins are
enabled for JTAG. When JTAG_ON is false, the four pins can be used for general PSD I/O.
JTAG_ON = PSDsoft_enabled +
*
Table 35. JTAG Enable Register
JTAG Enable
Bit definitions:
JTAG_ENABLE 1 = JTAG Port is Enabled.
Bits 1-7 are not used and should set to 0.
Bit 7
*
Bit 6
Microcontroller_enabled +
PSD_product_term_enabled;
*
0 = JTAG Port is Disabled.
Bit 5
/* An NVM configuration bit inside the PSD is set by the designer
/* The microcontroller can set a bit at run-time by writing to the
/* A dedicated product term (PT) inside the PSD can be used to
*
in the PSDsoft Configuration utility. This dedicates the pins for
JTAG at all times (compliant with IEEE 1149.1) */
PSD register, JTAG Enable. This register is located at address
CSIOP + offset C7h. Setting the JTAG_ENABLE bit in this
register will enable the pins for JTAG use. This bit is cleared
by a PSD reset or the microcontroller. See Table 35 for bit
definition. */
enable the JTAG pins. This PT has the reserved name
JTAGSEL. Once defined as a node in PSDabel, the designer
can write an equation for JTAGSEL. This method is used when
the Port C JTAG pins are multiplexed with other I/O signals.
It is recommended to logically tie the node JTAGSEL to the
JEN\ signal on the Flashlink cable when multiplexing JTAG
signals. See Application Note 54 for details.
Bit 4
*
Bit 3
*
Bit 2
*
Bit 1
*
JTAG_ENABLE
Preliminary
Bit 0