PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 18

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PSD813F1

Manufacturer Part Number
PSD813F1
Description
Flash In-System Programmable ISP Peripherals For 8-bit MCUs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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0
8.0
PSD813F1
Register
Description
and Address
Offset
14
PSD813F1-A
Table 7 shows the offset addresses to the PSD813F1 registers relative to the CSIOP base
address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
internal PSD813F1 registers. Table 7 provides brief descriptions of the registers in CSIOP
space. For a more detailed description, refer to section 9.
*
Table 7. Register Address Offset
Other registers that are not part of the I/O ports.
Data In
Control
Data Out
Direction
Drive Select
Input Micro Cell
Enable Out
Output
Micro Cells AB
Output
Micro Cells BC
Mask
Micro Cells AB
Mask
Micro Cells BC
Flash Protection
PSD/EE
Protection
JTAG Enable
PMMR0
PMMR2
Page
VM
Register Name
Port A Port B Port C Port D Other*
0C
0A
00
02
04
06
08
20
22
0D
0B
01
03
05
07
09
20
21
22
23
1A
10
12
14
16
18
21
23
1B
13
15
17
11
C0
C2
C7
B0
B4
E0
E2
Reads Port pin as input,
MCU I/O input mode
Selects mode between
MCU I/O or Address Out
Stores data for output
to Port pins, MCU I/O
output mode
Configures Port pin as
input or output
Configures Port pins as
either CMOS or Open
Drain on some pins, while
selecting high slew rate
on other pins.
Reads Input Micro Cells
Reads the status of the
output enable to the I/O
Port driver
Read – reads output of
Write – loads Micro cell
Read – reads output of
Write – loads Micro cell
Blocks writing to the
Blocks writing to the
Read only – Flash Sector
Read only – PSD Security
Enables JTAG Port
Power Management
Register 0
Power Management
Register 2
Page Register
Places PSD memory
areas in Program and/or
Data space on an
individual basis.
Micro Cells AB
Flip-Flops
Micro Cells BC
Flip-Flops
Output Micro Cells AB
Output Micro Cells BC
Protection
and EEPROM Sector
Protection
Description
Preliminary

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