MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 370
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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Input/Output (I/O) Ports
18.3 Port B
18.3.1 Port B Data Register (PTB)
Data Sheet
370
NOTE:
Alternative Function:
Address:
Port B is an 8-bit special-function port that shares two of its pins with the
multi-master IIC (MMIIC) module, two of its pins with SCI module, and
four of its pins with two timer interface (TIM1 and TIM2) modules.
PTB3–PTB0 are open-drain pins when configured as outputs regardless
whether the pins are used as general purpose I/O pins, MMIIC pins, or
SCI pins. Therefore, when configured as general purpose output pins,
MMIIC pins, or SCI pins (the TxD pin), pullup resistors must be
connected to these pins.
The port B data register contains a data latch for each of the eight port B
pins.
PTB[7:0] — Port B Data Bits
SDA and SCL — Multi-Master IIC Data and Clock
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits are software-programmable. Data direction of
each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
The SDA and SCL pins are multi-master IIC data and clock pins.
Setting the MMEN bit in the MMIIC control register 1 (MMCR1)
configures the PTB0/SDA and PTB1/SCL pins for MMIIC function and
overrides any control from the port I/O logic.
For More Information On This Product,
T2CH1
$0001
PTB7
Bit 7
Figure 18-6. Port B Data Register (PTB)
Go to: www.freescale.com
T2CH0
PTB6
6
T1CH1
PTB5
5
Unaffected by reset
T1CH0
PTB4
4
PTB3
RxD
MC68HC908AP Family — Rev. 2.5
3
PTB2
TxD
2
PTB1
SCL
1
MOTOROLA
PTB0
SDA
Bit 0
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