MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 147
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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9.6.2 Stop Mode
MC68HC908AP Family — Rev. 2.5
MOTOROLA
NOTE:
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module output (CGMOUT) in stop
mode, stopping the CPU and peripherals. Stop recovery time is
selectable using the SSREC bit in the configuration register 1
(CONFIG1). If SSREC is set, stop recovery is reduced from the normal
delay of 4096 ICLK cycles down to 32. This is ideal for applications using
canned oscillators that do not require long start-up times from stop
mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt
Freescale Semiconductor, Inc.
ICLK
RST
IAB
IDB
For More Information On This Product,
IDB
IAB
Figure 9-16. Wait Recovery from Interrupt or Break
$A6
Figure 9-17. Wait Recovery from Internal Reset
$A6
Go to: www.freescale.com
$6E0B
$A6
$6E0B
$A6
$A6
$A6
CYCLES
32
$6E0C
$01
CYCLES
$00FF
32
$0B
System Integration Module (SIM)
$00FE
$6E
RST VCT H RST VCT L
$00FD
Low-Power Modes
$00FC
Data Sheet
147
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