MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 357

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MC68HC908AP16CFA

Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC908AP Family — Rev. 2.5
MOTOROLA
MODE1 and MODE0 — Modes of Result Justification
If the external clock (CGMXCLK) is equal to or greater than 1MHz,
CGMXCLK can be used as the clock source for the ADC. If
CGMXCLK is less than 1MHz, use the PLL-generated bus clock as
the clock source. As long as the internal ADC clock is at f
operation can be guaranteed.
MODE1 and MODE0 selects between four modes of operation. The
manner in which the ADC conversion results will be placed in the ADC
data registers is controlled by these modes of operation. Reset
returns right-justified mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Internal bus clock
0 = External clock, CGMXCLK
Go to: www.freescale.com
MODE1
0
0
1
1
f
ADIC
Table 17-3. ADC Mode Select
=
MODE0
0
1
0
1
CGMXCLK or bus frequency
8-bit truncated mode
Right justified mode
Left justified mode
Left justified sign data mode
ADIV[2:0]
Justification Mode
Analog-to-Digital Converter (ADC)
ADIC
I/O Registers
Data Sheet
, correct
357

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