MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 350
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
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Analog-to-Digital Converter (ADC)
17.3.5 Auto-Scan Mode
17.3.6 Result Justification
Data Sheet
350
NOTE:
In auto-scan mode, the ADC input channel is selected by the value of the
2-bit up-counter, instead of the channel select bits, ADCH[4:0]. The
value of the counter also defines the data register ADRLx to be used to
store the conversion result. When ASCAN bit is set, a write to ADC
status and control register (ADSCR) will reset the auto-scan up-counter
and ADC conversion will start on the channel 0 up to the channel number
defined by the integer value of AUTO[1:0]. After a channel conversion is
completed, data is stored in ADRLx and the COCO-bit will be set. The
counter value will be incremented by 1 and a new conversion will start.
This process will continue until the counter value reaches the value of
AUTO[1:0]. When this happens, it indicates that the current channel is
the last channel to be converted. Upon the completion on the last
channel, the counter value will not be incremented and no further
conversion will be performed. To start another auto-scan cycle, a write
to ADSCR must be performed.
The system only provides 8-bit data storage in auto-scan code, user
must clear MODE[1:0] bits to select 8-bit truncation mode before
entering auto-scan mode.
It is recommended that user should disable the auto-scan function
before switching channel and also before entering STOP mode.
The conversion result may be formatted in four different ways.
All four of these modes are controlled using MODE0 and MODE1 bits
located in the ADC clock control register (ADICLK).
Freescale Semiconductor, Inc.
•
•
•
•
For More Information On This Product,
Left justified
Right justified
Left justified sign data mode
8-bit truncation
Go to: www.freescale.com
MC68HC908AP Family — Rev. 2.5
MOTOROLA
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