MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 279

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

14.10.4 IRSCI Status Register 1
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Address:
PEIE — Receiver Parity Error Interrupt Enable Bit
SCI status register 1 contains flags to signal these conditions:
SCTE — SCI Transmitter Empty Bit
Reset:
Read:
Write:
This read/write bit enables SCI error CPU interrupt
requests generated by the parity error bit, PE. (See
Status Register
•
•
•
•
•
•
•
•
This clearable, read-only bit is set when the IRSCDR transfers a
character to the transmit shift register. SCTE can generate an SCI
transmitter CPU interrupt request. When the SCTIE bit in IRSCC2 is
set, SCTE generates an SCI transmitter CPU interrupt request. In
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = SCI error CPU interrupt requests from PE bit enabled
0 = SCI error CPU interrupt requests from PE bit disabled
Receiver input idle
Receiver overrun
Transfer of IRSCDR data to transmit shift register complete
Transmission complete
Transfer of receive shift register data to IRSCDR complete
Noisy data
Framing error
Parity error
$0043
SCTE
Bit 7
Figure 14-15. IRSCI Status Register 1 (IRSCS1)
1
Go to: www.freescale.com
= Unimplemented
TC
6
1
1.) Reset clears PEIE.
Infrared Serial Communications Interface Module (IRSCI)
SCRF
5
0
IDLE
4
0
OR
3
0
NF
2
0
14.10.4 IRSCI
FE
1
0
I/O Registers
Data Sheet
Bit 0
PE
0
279