MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 125

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.7.2 Stop Mode
8.7.3 CGM During Break Interrupts
MC68HC908AP Family — Rev. 2.5
MOTOROLA
The STOP instruction disables the PLL analog circuits and no clock will
be driven out of the VCO.
When entering stop mode with the VCO clock (CGMPCLK) selected,
before executing the STOP instruction:
On exit from stop mode:
The system integration module (SIM) controls whether status bits in
other modules can be cleared during the break state. The BCFE bit in
the SIM break flag control register (SBFCR) enables software to clear
status bits during the break state. (See
Register.)
To allow software to clear status bits during a break interrupt, write a
logic 1 to the BCFE bit. If a status bit is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect the PLLF bit during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
the PLL control register during the break state without affecting the PLLF
bit.
1. Set the oscillator stop mode enable bit (STOP_XCLKEN in
2. Clear the BCS bit to select CGMXCLK as CGMOUT.
1. Set the PLLON bit if cleared before entering stop mode.
2. Wait for PLL to lock by checking the LOCK bit.
3. Set BCS bit to select CGMPCLK as CGMOUT.
Freescale Semiconductor, Inc.
For More Information On This Product,
CONFIG2) if continuos clock is required in stop mode.
Go to: www.freescale.com
9.7.3 SIM Break Flag Control
Clock Generator Module (CGM)
Special Modes
Data Sheet
125