MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 280

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Infrared Serial Communications
Data Sheet
280
TC — Transmission Complete Bit
SCRF — SCI Receiver Full Bit
IDLE — Receiver Idle Bit
Freescale Semiconductor, Inc.
normal operation, clear the SCTE bit by reading IRSCS1 with SCTE
set and then writing to IRSCDR. Reset sets the SCTE bit.
This read-only bit is set when the SCTE bit is set, and no data,
preamble, or break character is being transmitted. TC generates an
SCI transmitter CPU interrupt request if the TCIE bit in IRSCC2 is also
set. TC is automatically cleared when data, preamble or break is
queued and ready to be sent. There may be up to 1.5 transmitter
clocks of latency between queueing data, preamble, and break and
the transmission actually starting. Reset sets the TC bit.
This clearable, read-only bit is set when the data in the receive shift
register transfers to the SCI data register. SCRF can generate an SCI
receiver CPU interrupt request. When the SCRIE bit in IRSCC2 is set,
SCRF generates a CPU interrupt request. In normal operation, clear
the SCRF bit by reading IRSCS1 with SCRF set and then reading the
IRSCDR. Reset clears SCRF.
This clearable, read-only bit is set when 10 or 11 consecutive logic 1s
appear on the receiver input. IDLE generates an SCI receiver CPU
interrupt request if the ILIE bit in IRSCC2 is also set. Clear the IDLE
bit by reading IRSCS1 with IDLE set and then reading the IRSCDR.
After the receiver is enabled, it must receive a valid character that sets
the SCRF bit before an idle condition can set the IDLE bit. Also, after
the IDLE bit has been cleared, a valid character must again set the
SCRF bit before an idle condition can set the IDLE bit. Reset clears
the IDLE bit.
For More Information On This Product,
1 = IRSCDR data transferred to transmit shift register
0 = IRSCDR data not transferred to transmit shift register
1 = No transmission in progress
0 = Transmission in progress
1 = Received data available in IRSCDR
0 = Data not available in IRSCDR
1 = Receiver input idle
0 = Receiver input active (or idle since the IDLE bit was cleared)
Go to: www.freescale.com
MC68HC908AP Family — Rev. 2.5
MOTOROLA