MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 335

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

16.6.6 MMIIC Data Receive Register (MMDRR)
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Address:
If the calling master does not return an acknowledge bit (MMRXAK = 1),
the module will release the SDA line for master to generate a STOP or
repeated START condition. The data in the MMDTR will not be
transferred to the output circuit until the next calling from a master. The
transmit buffer empty flag remains cleared (MMTXBE = 0).
In master mode, the data in MMDTR will be transferred to the output
circuit when:
If the slave does not return an acknowledge bit (MMRXAK = 1), the
master will generate a STOP or repeated START condition. The data in
the MMDTR will not be transferred to the output circuit. The transmit
buffer empty flag remains cleared (MMTXBE = 0).
The sequence of events for slave transmit and master transmit are
illustrated in
When the MMIIC module is enabled, MMEN = 1, data in this read-only
register depends on whether module is in master or slave mode.
Reset:
Read: MMRD7
Write:
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the module receives an acknowledge bit (MMRXAK = 0), after
setting master transmit mode (MMRW = 0), and the calling
address has been transmitted; or
the previous data in the output circuit has be transmitted and the
receiving slave returns an acknowledge bit, indicated by a
received acknowledge bit (MMRXAK = 0).
Figure 16-9. MMIIC Data Receive Register (MMDRR)
$004D
Bit 7
0
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Figure
= Unimplemented
MMRD6
6
0
16-12.
MMRD5
5
0
MMRD4
4
0
MMRD3
3
0
Multi-Master IIC Interface (MMIIC)
MMRD2
2
0
MMIIC I/O Registers
MMRD1
1
0
Data Sheet
MMRD0
Bit 0
0
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