PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 427

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 27-42: RXMnSIDL: RECEIVE ACCEPTANCE MASK ‘n’ STANDARD IDENTIFIER MASK
REGISTER 27-43: RXMnEIDH: RECEIVE ACCEPTANCE MASK ‘n’ EXTENDED IDENTIFIER MASK
REGISTER 27-44: RXMnEIDL: RECEIVE ACCEPTANCE MASK ‘n’ EXTENDED IDENTIFIER MASK
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-x
R/W-x
EID15
R/W-x
SID2
EID7
This bit is available in Mode 1 and 2 only.
SID<2:0>: Standard Identifier Mask bits or Extended Identifier Mask bits (EID<20:18>)
Unimplemented: Read as ‘ 0 ’
Mode 0:
Unimplemented: Read as ‘ 0 ’
Mode 1, 2:
EXIDEN: Extended Identifier Filter Enable Mask bit
1 = Messages selected by the EXIDEN bit in RXFnSIDL will be accepted
0 = Both standard and extended identifier messages will be accepted
Unimplemented: Read as ‘ 0 ’
EID<17:16>: Extended Identifier Mask bits
EID<15:8>: Extended Identifier Mask bits
EID<7:0>: Extended Identifier Mask bits
EID14
R/W-x
R/W-x
R/W-x
SID1
EID6
REGISTERS, LOW BYTE [0  n  1]
REGISTERS, HIGH BYTE [0  n  1]
REGISTERS, LOW BYTE [0  n  1]
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
EID13
R/W-x
SID0
EID5
EID12
R/W-x
R/W-x
EID4
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
EXIDEN
R/W-0
R/W-x
EID11
R/W-x
EID3
(1)
(1)
R/W-x
EID10
R/W-x
EID2
U-0
—
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x
EID17
R/W-x
R/W-x
EID9
EID1
DS39977C-page 427
EID16
R/W-x
R/W-x
R/W-x
EID8
EID0
bit 0
bit 0
bit 0